TC5565APL datasheet(4/9 Pages) TOSHIBA

Part #	TC5565APL

Description	65,536 bit static random access memory organized as 8,192 words by 8 bits using CMOS technology

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Manufacturer	TOSHIBA [Toshiba Semiconductor]

Direct Link	http://www.semicon.toshiba.co.jp/eng

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TC5565APL-10, TC5565APL-12, TC5565APL-15

TC5565AFL-10, TC5565AFL-12, TC5565AFL-15

A.C. CHARACTERISTICS (Ta=0~70°C, V

DD = 5V±10%)

Read Cycle

SYMBOL PARAMETER

TC5565APL-10

TC5565AFL-10

TC5565APL-12

TC5565AFL-12

TC5565APL-15

TC5565AFL-15

MIN.

MAX.

MIN.

MAX.

MIN.

MAX

tRC

Read Cycle Time

100

-

120

-

150

-

tACC

Address Access Time

-

100

-

120

-

150

tCOL

\CE1 Access Time

-

100

-

120

-

150

tC02

CE2 Access Time

-

100

-

120

-

150

tOE

Output Enable to Output Valid

-

50

-

60

-

70

tCOE

Chip Enable (\CE1, CE2) to

Output in Low-Z

10

-

10

-

15

-

tOEE

Output Enable to Output in Low-Z

5

-

5

-

5

-

tOD

Chip Enable (CE1, CE2) to

Output in High-Z

-

35

-

40

-

50

tODO

Output Enable to Output in High-Z

-

35

-

40

-

50

tOH

Output Data Hold Time

20

-

20

-

20

-

Write Cycle

TC5565APL-10

TC5565AFL-10

TC5565APL-12

TC5565AFL-12

TC5565APL- 5

TC5565AFL- 5

SYMBOL

PARAMETER

MIN.

MAX.

MIN.

MAX.

MIN.

MAX..

tWC

Write Cycle Time

100

-

120

-

150

-

tWP

Write Pulse Width

60

-

70

-

90

-

tCW

Chip Selection to End of Write

80

-

85

-

100

-

tAS

Address Set up Time

0

-

0

-

0

-

rWR

Write Recovery Time

0

-

0

-

0

-

tODW

R/W to Output High-Z

-

35

0

40

-

50

rOEW

R/W to Output Low-Z

5

-

5

-

10

-

tDS

Data Set up Time

40

-

50

-

60

-

tDH

Data Hold Time

0

-

0

-

0

-

A.C. TEST CONDITION

Output Load

: 100pF + 1 TTL Gate

Input Pulse Level

: 0.6V, 2.4V

Timing Measurement

VIN

: 0.8V, 2.2V

Reference Level

VOUT

: 0.8V, 2.2V

tr, tf

: 5ns

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TC5565APL Datasheet(PDF) 4 Page - Toshiba Semiconductor

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