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APW7098 Datasheet(PDF) 21 Page - Anpec Electronics Coropration

Part No. APW7098
Description  Two- Phase Buck PWM Controller with Integrated MOSFET Drivers
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Maker  ANPEC [Anpec Electronics Coropration]
Homepage  http://www.anpec.com.tw
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APW7098 Datasheet(HTML) 21 Page - Anpec Electronics Coropration

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Copyright
© ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
APW7098
www.anpec.com.tw
21
Application Information
Output Voltage Setting
The output voltage is adjustable from 0.6V to 2.5V
with a resistor-divider connected with FB, AGND, and
converter’s output. Using 1% or better resistors for the
resistor-divider is recommended. The output voltage
is determined by:
Where 0.6 is the reference voltage, R
TOP is the resistor
connected from converter’s output to FB, and R
GND is the
resistor connected from FB to the the AGND. Suggested
R
GND is in the range from 1K to 20kΩ. To prevent stray
pickup, locate resistors R
TOP and RGND close to the
APW7098.
TOP
OUT
GND
R
V
0.61
R

=
×+



PWM Compensation
The output LC filter of a step down converter introduces a
double pole, which contributes with -40dB/decade gain
slope and 180 degrees phase shift in the control loop. A
compensation network among COMP, FB, and V
OUT
should be added. The compensation network is shown
in Figure 8. The output LC filters consists of the
output inductors and output capacitors. For two-phase
convertor, when assuming V
IN1=VIN2=VIN, L1=L2=L, the
transfer function of the LC filter is given by:
The poles and zero of this transfer functions are:
The F
LC is the double-pole frequency of the two-phase LC
filters, and F
ESR is the frequency of the zero introduced by
the ESR of the output capacitors.
Figure 5. The Output LC Filter
Figure 6. Frequency Resopnse of the LC filters
F
LC
F
ESR
-40dB/dec
-20dB/dec
Frequency(Hz)
The PWM modulator is shown in figure 7. The input is the
output of the error amplifier and the output is the PHASE
node. The transfer function of the PWM modulator is given
by :
Figure 7. The PWM Modulator
The compensation network is shown in figure 8. It pro-
vides a close loop transfer function with the highest zero
crossover frequency and sufficient phase margin.
The transfer function of error amplifier is given by :
(
)
×
+
×
×
×
+
+


×
+
+
×
×
+
×
×
×
+
=
C3
R3
1
s
C2
C1
R2
C2
C1
s
s
C3
R3
R1
1
s
C2
R2
1
s
C1
R3
R1
R3
R1
OUT
ESR
C
ESR
2
1
F
×
×
π
×
=
+
+
=
=
sC3
1
R3
R1//
sC2
1
R2
//
sC1
1
V
V
GAIN
OUT
COMP
AMP
OSC
IN
PWM
V
V
GAIN
=
OSC
Output of Error
Amplifier
∆V
OSC
PWM
Comparator
Driver
Driver
PHASE
V
IN
1
C
ESR
s
C
L
2
1
s
C
ESR
s
1
GAIN
OUT
UT
O
2
OUT
LC
+
×
×
+
×
×
×
×
+
=
OUT
LC
C
L
2
1
2
1
F
×
×
π
×
=
V
PHASE1
L1=L
V
OUT
C
OUT
ESR
V
PHASE2
L2=L


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