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APW7098 Datasheet(PDF) 18 Page - Anpec Electronics Coropration

Part No. APW7098
Description  Two- Phase Buck PWM Controller with Integrated MOSFET Drivers
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Maker  ANPEC [Anpec Electronics Coropration]
Homepage  http://www.anpec.com.tw
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APW7098 Datasheet(HTML) 18 Page - Anpec Electronics Coropration

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Copyright
© ANPEC Electronics Corp.
Rev. A.6 - Oct., 2009
APW7098
www.anpec.com.tw
18
Function Description (Cont.)
Reference Voltage Selection and Shutdown Control
(Cont.)
REFIN/EN pin determines which reference voltage is
used. If this REFIN/EN pin is driven by an external
voltage ranged from 0.4V to 2V, the IC uses the V
REFIN/EN
voltage as reference voltage of the converter with soft-
start control. If external reference is not available, con-
nect this pin to 5VCC for internal 0.6V reference used.
Once the internal or external reference is selected, the
reference source is latched. Cycling the POR signal re-
sets the latch.
The other function of REFIN/EN pin is used to enable or
shut off the IC. Pulling the V
REFIN/EN voltage below 0.4V
(typical) shuts down the two-phase PWM controller. In
the shutdown mode, the two-phase UGATE and LGATE
signals are pulled to PHASE and PGND respectively, the
output is floating.
Operation Phase Selection
The MODE pin programs single- or two- phase operation.
It has a typical value for rising threshold of 0.8V, V
MODE_THR,
with 0.16V of hysteresis (0.64V), V
MODE_THF. When the MODE
pin voltage is higher than V
MODE_THR, the device operates
in single-phase; when the MODE pin voltage is lower
than V
MODE_THF and VIN2 supply voltage is above approxi-
mate 4V, the device operates in two-phase operation.
This function makes the APW7098 ideally suitable for
dual power input applications like PCIE interfaced graphic
cards.
The figure 2 shows the power sources of the two
channels. The input power of PWM1 converter is sup-
plied by PCIE bus power and the input power of PWM2
converter is supplied by an external power. If the input
power connector of PWM2 converter is not plugged into
the socket before start-up, the internal V
IN2 sensing circuit
can sense the absence of V
IN2 and set the IC to operate in
single-phase mode with PWM2 disabled. When the IC
operates in two-phase mode, it can switch the operating
mode from two-phase to single-phase operation. Once
operating in single-phase mode, the operation mode is
latched. It is required to toggle SS, REFIN/EN, or 5VCC
pin to reset the IC.
Figure 2. V
IN2 Sensing Circuit
Over-Voltage Protection (OVP)
The over-voltage protection function monitors the output
voltage through the FB pin. When the FB voltage in-
creases over 125% of the reference voltage (V
R) due to
the high-side MOSFET failure or other reasons, the over-
voltage protection comparator designed with a 2
µs
noise filter will force the low-side MOSFET gate drivers
high. This action actively pulls down the output voltage
and eventually attempts to trigger the over-current shut-
down of an ATX power supply. As soon as the output
voltage is within regulation, the OVP comparator is
disengaged. The chip will restore its normal operation.
When the OVP occurs, the REFOUT/POK will drop to low
as well.
Under-Voltage Protection (UVP)
In the process of operation, when a short-circuit occurs,
the output voltage will drop quickly. Before the over-cur-
rent protection responds, the output voltage will fall
out of the required regulation range. The under-voltage
continually monitors the V
FB voltage after soft-start is
completed. If a load step is strong enough to pull the
output voltage lower than the under-voltage threshold,
the IC shuts down converter’s output. Cycling the 5VCC
POR or REFIN/EN signal resets the fault latch and starts
a start-up process. The under-voltage threshold is 50% of
the nominal output voltage. The under-voltage compara-
tor has a built-in 2
µs noise filter to prevent the chips
from wrong UVP shutdown being caused by noise.
PWM 1
converter
PCIE
+12V
PWM 2
converter
External
Power
V
IN2
PHASE2
VCC
4V
MODE
V
IN2 sensing
circuit
Operation
Phase
Selection
This OVP scheme only clamps the voltage overshoot,
and does not invert the output voltage when otherwise
activated with a continuously high output from low-side
MOSFETs driver, which is a common problem for OVP
schemes with a latch.


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