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LTC3823EGNPBF Datasheet(PDF) 8 Page - Linear Technology |
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LTC3823EGNPBF Datasheet(HTML) 8 Page - Linear Technology |
8 / 26 page LTC3823 8 3823fd PIN FUNCTIONS (UH/GN) PGND (Pin 22/Pin 22): Power Ground. Connect this pin closely to the source of the bottom N-channel MOSFET, the (–) terminal of CVCC and CIN. SENSE– (Pin 23/Pin 23): Current Sense Comparator In- put. The negative input to the current comparator is used to accurately Kelvin sense the bottom side of the sense resistor or MOSFET. SENSE+ (Pin 24/Pin 24): Current Sense Comparator Input. The positive input to the current comparator is normally connected to the SW node unless using a sense resistor. SW (Pin 25/Pin 25): Switch Node. The (–) terminal of the bootstrap capacitor, CB, connects here. This pin swings from a diode drop below ground up to VIN. TG (Pin 26/Pin 26): Top Gate Drive Output. This pin drives the top N-channel MOSFET with a voltage swing equal to INTVCC, superimposed on the switch node voltage SW. BOOST (Pin 27/Pin 27): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor, CB, connects here. This pin swings from a diode voltage drop below INTVCC up to VIN + INTVCC. Z0 (Pin 28/Pin 28): Dead Time Control Input. Applying a DC voltage at this pin will vary the dead time between TG low and BG high transition. Do not force a voltage higher than INTVCC on this pin. FCB (Pin 29/Pin 1): Forced Continuous Input. Connect this pin to SGND to forced continuous synchronization operation at low load, to INTVCC to enable discontinuous mode operation at low load, or to a resistive divider from a secondary output when using a secondary winding. RUN (Pin 30/Pin 2): Run Control Input. A voltage above 1.5V turns on the IC. Forcing this pin below 1.5V shuts down the device. VON (Pin 31/Pin 3): On-Time Input. Connecting this pin to the output voltage makes the on-time proportional to VOUT. The comparator input defaults to 0.6V when the pin is grounded and defaults to 4.8V when the pin is tied to INTVCC. PGOOD (Pin 32/Pin 4): Power Good Output. Open-drain logic that is pulled to ground when the output voltage is not within ±11% of the regulation point after the internal 20μs power bad mask timer expires. SGND (Exposed Pad Pin 33, UH Package): The exposed pad is signal ground. It must be soldered to PCB ground for electrical contact and for rated thermal performance. |
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