CY8C3865LTI-024 datasheet(6/100 Pages) CYPRESS

Part #	CY8C3865LTI-024

Description	Programmable System-on-Chip (PSoC)

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Manufacturer	CYPRESS [Cypress Semiconductor]

Direct Link	http://www.cypress.com

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6 / 100 page

PRELIMINARY

PSoC®3: CY8C38 Family Data Sheet

Document Number: 001-11729 Rev. *I

Page 6 of 100

Figure 2-1. 48-Pin SSOP Part Pinout

Figure 2-2. 48-Pin QFN Part Pinout[3]

SSOP

Vssa

(SIO) P12[3]

247

Vcca

(OpAmp2out, GPIO) P0[0]

346

P15[3] (GPIO, kHz XTAL: Xi)

(OpAmp0out, GPIO) P0[1]

445

P12[0] (SIO, I2C1: SCL)

Vddio0

742

P12[1] (SIO, I2C1: SDA)

643

(OpAmp0-/Extref0, GPIO) P0[3]

P15[1] (GPIO, MHz XTAL: Xi)

(OpAmp2-, GPIO) P0[5]

940

P15[0] (GPIO, MHz XTAL: Xo)

(IDAC0, GPIO) P0[6]

10

39

Vccd

(IDAC2, GPIO) P0[7]

11

38

Vssd

Vccd

12

37

Vddd

Vssd

13

36

P15[7] (USBIO, D-, SWDCK)

Vddd

14

35

P15[6] (USBIO, D+, SWDIO)

(GPIO) P2[3]

15

34

P1[7] (GPIO)

(GPIO) P2[4]

16

33

P1[6] (GPIO)

Vddio2

17

32

Vddio1

(GPIO) P2[5]

18

31

P1[5] (GPIO, nTRST)

(GPIO) P2[6]

19

30

P1[4] (GPIO, TDI)

(GPIO) P2[7]

20

29

P1[3] (GPIO, TDO, SWV)

Vssb

21

28

Ind

22

27

P1[1] (GPIO, TCK, SWDCK)

Vboost

23

26

P1[0] (GPIO, TMS, SWDIO)

Vbat

24

25

Vdda

(SIO) P12[2]

148

Vddio3

(OpAmp2+, GPIO) P0[4]

841

P15[2] (GPIO, kHz XTAL: Xo)

(OpAmp0+, GPIO) P0[2]

544

Lines show

Vddio to IO

supply

association

P1[2] (GPIO, configurable XRES)

[2]

QFN

( Top View)

10

11

12

Vssb

Ind

Vb

Vbat

35

34

33

32

31

30

29

28

27

26

25

36

1

2

3

4

5

6

7

8

9

Vcca

Vssa

Vdda

P12[2] (SIO)

P12[3] (SIO)

P0[0] (OpAmp2out, GPIO)

P0[1] (OpAmp0out, GPIO)

P0[2] (OpAmp0+, GPIO)

P0[3] (OpAmp0-/Extref0, GPIO)

(GPIO) P2[6]

(GPIO) P2[7]

(GPIO, nTRST) P1[5]

(GPIO, TDI) P1[4]

(GPIO, TDO, SWV) P1[3]

(GPIO, TCK, SWDCK) P1[1]

(GPIO, TMS, SWDIO) P1[0]

(GPIO, Configurable XRES) P1[2]

P12[1] (SIO, I2C1: SDA)

P15[3] (GPIO, kHz XTAL: Xi)

P15[2] (GPIO, kHz XTAL: Xo)

Lines show

Vddio to I/O

supply

association

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