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CY8C24633
Document Number: 001-20160 Rev. *B
Page 10 of 35
Register Reference
This section lists the registers of the CY8C24633 PSoC device by using mapping tables, in offset order.
Register Conventions
The register conventions specific to this section are listed in the
following table.
Register Mapping Tables
The PSoC device has a total register address space of 512
bytes. The register space is referred to as I/O space and is
divided into two banks. The XIO bit in the Flag register (CPU_F)
determines which bank the user is currently in. When the XIO bit
is set the user is in Bank 1.
Note In the following register mapping tables, blank fields are
reserved and should not be accessed.
Convention
Description
R
Read register or bit(s)
W
Write register or bit(s)
L
Logical register or bit(s)
C
Clearable register or bit(s)
#
Access is bit specific
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