6

FN6931.0

December 21, 2009

ISL80101 Schematic Block Diagram

Application Section

Input Voltage Requirements

Despite other output voltages offered, this family of LDOs

is optimized for a true 2.5V to 1.8V conversion where the

input supply can have a tolerance of as much as ±10%

for conditions noted in the “Electrical Specifications” table

on page 3. Minimum guaranteed input voltage is 2.2V.

margin higher than the output voltage plus dropout at

the maximum rated current of the application if active

Dropout spec of this family of LDOs has been generously

specified in order to allow applications to design for a

level of efficiency that can accommodate the smaller

outline package for those applications that cannot

accommodate the profile of the TO220/263.

External Capacitor Requirements

GENERAL GUIDELINE

External capacitors are required for proper operation.

Careful attention must be paid to layout guidelines and

selection of capacitor type and value to ensure optimal

performance.

OUTPUT CAPACITOR

The required minimum output capacitor is 10µF X5R/X7R

to ensure stable operation. Additional capacitors of any

value in Ceramic, POSCAP or Alum/Tantalum Electrolytic

types may be placed in parallel to improve PSRR at

higher frequencies and/or load transient AC output

voltage tolerances. This minimum capacitor must be

traces no longer than 0.5cm.

INPUT CAPACITOR

The minimum input capacitor required for proper

operation is 10µF having a ceramic dielectric. This

Ground pins of the LDO with PCB traces no longer than

0.5cm.

Thermal Fault Protection

In the event the die temperature exceeds typically

+160°C, then the output of the LDO will shut down until

the die temperature can cool down to typically +130°C.

The level of power combined with the thermal resistance

of the package (+45°C/W for DFN) will determine if the

junction temperature exceeds the thermal shutdown

temperature specified in the “Electrical Specifications”

table on page 3 (see thermal packaging guidelines).

Current Limit Protection

The ISL80101 LDO incorporates protection against

overcurrent due to any short or overload condition

applied to the output pin. The current limit circuit

performs as a constant current source when the output

current exceeds the current limit threshold noted in the

“Electrical Specifications” table on page 3. If the short or

output returns to normal voltage mode regulation. In the

event of an overload condition on the DFN package the

LDO will begin to cycle on and off due to the die

temperature exceeding thermal fault condition. The

TO220/263 package will tolerate higher levels of power

dissipation on the die which may never thermal cycle if

the heatsink of this larger package can keep the die

temperature below the specified typical thermal

shutdown temperature.

SS

REFERENCE

BIAS

LEVEL

SHIFT

OCL

THERMAL

SHUTDOWN

GND

PGOOD

ADJ

SENSE

VOUT

ENABLE

SS

VIN

POWER

PMOS

+

-

+

-

ISL80101