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ISL80102IR33Z Datasheet(PDF) 2 Page - Intersil Corporation |
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ISL80102IR33Z Datasheet(HTML) 2 Page - Intersil Corporation |
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2 / 16 page  2 FN6660.0 September 30, 2009 Block Diagram Pin Descriptions PIN NUMBER PIN NAME DESCRIPTION 1, 2 VOUT Output voltage pin. 3 SENSE/ADJ Remote voltage sense for internally fixed VOUT options. ADJ pin for externally set VOUT. 4PG VOUT in regulation signal. Logic low defines when VOUT is not in regulation. Must be grounded if not used. 5GND GND pin. 6 SS External cap controls in-rush current. 7ENABLE VIN independent chip enable. TTL and CMOS compatible. 8 DNC Do not connect this pin to ground or supply. Leave floating. 9, 10 VIN Input supply pin. EPAD Must be soldered directly to GND plane 10µA 10µA R7 R8 R9 R4 M5 M4 EN EN EN EN EN EN M7 500mV 485mV 500mV M3 POWER PMOS M1 VIN VOUT SNS R1 R4 R2 R3 GND PG ADJ LEVEL SHIFT M2 + - + - + - + - + - + - + - V TO I SS IL/10,000 IL ISL80102, ISL80103 |
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