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AT24C02BN-SP25-B Datasheet(PDF) 10 Page - ATMEL Corporation |
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AT24C02BN-SP25-B Datasheet(HTML) 10 Page - ATMEL Corporation |
10 / 20 page 10 8517C–SEEPR–01/09 AT24C01B/02B/04B/08B operation desired. Only if the internal write cycle has completed will the EEPROM respond with a “0”, allowing the read or write sequence to continue. 11. Read Operations Read operations are initiated the same way as write operations with the exception that the read/write select bit in the device address word is set to “1”. There are three read operations: current address read, random address read and sequential read. CURRENT ADDRESS READ: The internal data word address counter maintains the last address accessed during the last read or write operation, incremented by one. This address stays valid between operations as long as the chip power is maintained. The address “roll over” during read is from the last byte of the last memory page to the first byte of the first page. The address “roll over” during write is from the last byte of the current page to the first byte of the same page. Once the device address with the read/write select bit set to “1” is clocked in and acknowledged by the EEPROM, the current address data word is serially clocked out. The microcontroller does not respond with an input “0” but does generate a following stop condition (see Figure 11-4 on page 11). RANDOM READ: A random read requires a “dummy” byte write sequence to load in the data word address. Once the device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must generate another start condition. The microcontroller now initiates a current address read by sending a device address with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word. The microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 11-5 on page 11). SEQUENTIAL READ: Sequential reads are initiated by either a current address read or a ran- dom address read. After the microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the memory address limit is reached, the data word address will “roll over” and the sequential read will continue. The sequential read operation is terminated when the microcontroller does not respond with a “0” but does generate a following stop condition (see Figure 11-6 on page 12). Figure 11-1. Device Address MSB 1K/2K 1 0 1 0 A2 A1 A0 R/W 4K 1 0 1 0 A2 A1 P0 R/W 8K 1 0 1 0 A2 P1 P0 R/W |
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