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CPC7594MATR Datasheet(PDF) 1 Page - Clare, Inc. |
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CPC7594MATR Datasheet(HTML) 1 Page - Clare, Inc. |
1 / 20 page RoHS 2002/95/EC e3 Pb DS-CPC7594 - R03 www.clare.com 1 Features • TTL logic level inputs for 3.3V logic interfaces • Smart logic for power up / hot plug state control • Small 16-pin SOIC or 16-pin DFN Package • DFN package printed-circuit board footprint is 60 percent smaller than the SOIC version, 70 percent smaller than 4th generation EMR solutions. • Monolithic IC reliability • Low matched R ON • Eliminates the need for zero cross switching • Flexible switch timing to transition from ringing mode to talk mode. • Clean, bounce-free switching • Tertiary protection consisting of integrated current limiting, voltage clamping, and thermal shutdown for SLIC protection • 5 V operation with power consumption < 10 mW • Intelligent battery monitor • Latched logic-level inputs, no external drive circuitry required Applications • VoIP Gateways • Central office (CO) • Digital Loop Carrier (DLC) • PBX Systems • Digitally Added Main Line (DAML) • Hybrid Fiber Coax (HFC) • Fiber in the Loop (FITL) • Pair Gain System • Channel Banks Description The CPC7594 is a member of Clare’s next generation Line Card Access Switch family. This monolithic 6-pole solid-state switch is available in either a 16-pin SOIC or a 16-pin DFN package. It provides the necessary functions to replace two 2-Form-C electro-mechanical relays used on traditional analog and contemporary integrated voice and data (IVD) line cards found in Central Office, Access, and PBX equipment. Because this device contains solid state switches for tip and ring line break, ringing injection/return and channel test access, it requires only a +5V supply for operation and TTL logic-level inputs for control. The CPC7594 is particularly designed for IVD line cards where an EMR is required for line test due to the high frequencies typical of ADSL but solid-state switches are desired for switching and test-in functions. The CPC7594xC logic differs from the CPC7594xA/B logic by providing a monitor function during the test state. Ordering Information Figure 1. CPC7594 Block Diagram CPC7594 x x xx B - 16-pin SOIC delivered 50/Tube, 1000/Reel M - 16-pin DFN delivered 52/Tube, 1000/Reel A - With Protection SCR B - Without Protection SCR C - With Protection SCR and “Monitor Test State” TR - Add for Tape & Reel Version CPC7594 part numbers are specified as shown here: CPC7594 T LINE R LINE T BAT V DD R BAT D GND V BAT F GND V REF IN TEST IN RINGING T SD LATCH 4 13 3 6 7 8 15 2 14 9 10 11 L A T C H Switch Control Logic +5V DC SLIC 1 XSW5 T(T ) TEST CHANTEST 6 XSW6 R(R ) TEST CHANTEST 5 X T RINGING SW3 X X SW2 SW1 Secondary Protection Tip Ring 12 XSW4 300 (min.) Ω RINGING V BAT R RINGING SCR Trip Circuit (CPC7594xA/C) CPC7594 Line Card Access Switch |
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