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CPC7591BATR Datasheet(PDF) 10 Page - Clare, Inc. |
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CPC7591BATR Datasheet(HTML) 10 Page - Clare, Inc. |
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10 / 19 page  CPC7591 10 www.clare.com R05 2. Functional Description 2.1 Introduction The CPC7591 has three states: • Talk. Line break switches SW1 and SW2 closed, ringing switches SW3 and SW4 open. • Ringing. Ringing switches SW3 and SW4 closed, line break switches SW1 and SW2 open. • All-off. All switches open. See “Truth Table” on page 9 for more information. The CPC7591 offers break-before-make and make-before-break switching from the ringing state to the talk state with simple TTL level logic input control. Solid-state switch construction means no impulse noise is generated when switching during ringing cadence or ring trip, eliminating the need for external zero-cross switching circuitry. State-control is via TTL logic-level input so no additional driver circuitry is required. The linear line break switches SW1 and SW2 have exceptionally low RON and excellent matching characteristics. The ringing switch, SW4, has a minimum open contact breakdown voltage of 465 V at +25 °C, sufficiently high with proper protection to prevent breakdown in the presence of a transient fault condition (i.e., passing the transient on to the ringing generator). Integrated into the CPC7591 is an over-voltage clamping circuit, active current limiting, and a thermal shutdown mechanism to provide protection to the SLIC during a fault condition. Positive and negative lightning surge currents are reduced by the current limiting circuitry and hazardous potentials are diverted away from the SLIC via the protection diode bridge or the optional integrated protection SCR. Power-cross potentials are also reduced by the current limiting and thermal shutdown circuits. To protect the CPC7591 from an overvoltage fault condition, the use of a secondary protector is required. The secondary protector must limit the voltage seen at the TLINE and RLINE terminals to a level below the maximum breakdown voltage of the switches. To minimize the stress on the solid-state contacts, use of a foldback or crowbar type secondary protector is highly recommended. With proper selection of the secondary protector, a line card using the CPC7591 will meet all relevant ITU, LSSGR, TIA/EIA and IEC protection requirements. The CPC7591 operates from a single +5 V supply only. This gives the device extremely low idle and active power consumption with virtually any range of battery voltage. The battery voltage used by the CPC7591 has a two fold function. For protection purposes it is used as a fault condition current source for the internal integrated protection circuitry. Secondly, it is used as a reference so that in the event of battery voltage loss, the CPC7591 will enter the all-off state. 2.2 Under Voltage Switch Lock Out Circuitry 2.2.1 Introduction Smart logic in the CPC7591 now provides for switch state control during both power up and power loss transitions. An internal detector is used to evaluate the VDD supply to determine when to de-assert the under voltage switch lock out circuitry with a rising VDD and when to assert the under voltage switch lock out circuitry with a falling VDD. Any time unsatisfactory low VDD conditions exist, the lock out circuit overrides user switch control by blocking the information at the external input pins and conditioning internal switch commands to the all-off state. Upon restoration of VDD, the switches will remain in the all-off state until the LATCH input is pulled low. The rising VDD switch lock-out release threshold is internally set to ensure all internal logic is properly biased and functional before accepting external switch commands from the inputs to control the switch states. For a falling VDD event, the lock-out threshold is set to assure proper logic and switch behavior up to the moment the switches are forced off and external inputs are suppressed. To facilitate hot plug insertion and system power up state control, the LATCH pin has an integrated weak pull up resistor to the VDD power rail that will hold a non-driven LATCH pin at a logic high state. This enables board designers to use the CPC7591 with FPGAs and other devices that provide high impedance outputs during power up and logic configuration. The weak pull up allows a fan out of up to 32 when the system’s LATCH control driver has a logic low minimum sink capability of 4mA. |
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