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CC2531 Datasheet(PDF) 9 Page - Texas Instruments

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Part # CC2531
Description  A USB Enabled System-On-Chip Solution for 2.4-GHz IEEE 802.15.4 and ZigBee Applications
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

CC2531 Datasheet(HTML) 9 Page - Texas Instruments

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ADC CHARACTERISTICS
CC2531
www.ti.com ........................................................................................................................................................................................ SWRS086 – SEPTEMBER 2009
TA = 25°C and VDD = 3 V, unless otherwise noted.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Input voltage
VDD is voltage on AVDD5 pin
0
VDD
V
External reference voltage
VDD is voltage on AVDD5 pin
0
VDD
V
External reference voltage differential
VDD is voltage on AVDD5 pin
0
VDD
V
Input resistance, signal
Using 4-MHz clock speed
197
k
Full-scale signal(1)
Peak-to-peak, defines 0 dBFS
2.97
V
Single-ended input, 7-bit setting
5.7
Single-ended input, 9-bit setting
7.5
Single-ended input, 10-bit setting
9.3
Single-ended input, 12-bit setting
10.8
ENOB(1)
Effective number of bits
bits
Differential input, 7-bit setting
6.5
Differential input, 9-bit setting
8.3
Differential input, 10-bit setting
10.0
Differential input, 12-bit setting
11.5
Useful power bandwidth
7-bit setting, both single and differential
0–20
kHz
Single-ended input, 12-bit setting, –6 dBFS
–75.
2
THD(1)
Total harmonic distortion
dB
Differential input, 12-bit setting, –6 dBFS
–86.
6
Single-ended input, 12-bit setting
70.2
Differential input, 12-bit setting
79.3
Signal to nonharmonic ratio(1)
dB
Single-ended input, 12-bit setting, –6 dBFS
78.8
Differential input, 12-bit setting, –6 dBFS
88.9
Differential input, 12-bit setting, 1-kHz sine (0
CMRR
Common-mode rejection ratio
>84
dB
dBFS), limited by ADC resolution
Single-ended input, 12-bit setting, 1-kHz sine (0
Crosstalk
>84
dB
dBFS), limited by ADC resolution
Offset
Midscale
–3
mV
Gain error
0.68
%
12-bit setting, mean
0.05
DNL(1)
Differential nonlinearity
LSB
12-bit setting, maximum
0.9
12-bit setting, mean
4.6
INL(1)
Integral nonlinearity
LSB
12-bit setting, maximum
13.3
Single-ended input, 7-bit setting
35.4
Single-ended input, 9-bit setting
46.8
Single-ended input, 10-bit setting
57.5
Single-ended input, 12-bit setting
66.6
SINAD(1)
Signal-to-noise-and-distortion
dB
(–THD+N)
Differential input, 7-bit setting
40.7
Differential input, 9-bit setting
51.6
Differential input, 10-bit setting
61.8
Differential input, 12-bit setting
70.8
7-bit setting
20
9-bit setting
36
Conversion time
µs
10-bit setting
68
12-bit setting
132
Power consumption
1.2
mA
Internal reference voltage
1.15
V
(1)
Measured with 300-Hz sine-wave input and VDD as reference.
Copyright © 2009, Texas Instruments Incorporated
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