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LTC2472IMSTRPBF Datasheet(PDF) 10 Page - Linear Technology |
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LTC2472IMSTRPBF Datasheet(HTML) 10 Page - Linear Technology |
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10 / 20 page  LTC2470/LTC2472 10 24702f APPLICATIONS INFORMATION Data Input Format The data input word is 4 bits long and consists of two en- able bits (EN1 and EN2) and two programming bits (SPD and SLP) see Table 2. EN1 is applied to the first rising edge of SCK after the conversion is complete. Programming is enabled by setting EN1 = 1 and EN2 = 0. Table 2. Input Data Format BIT NAME FUNCTION EN1 Should Be High (EN1 = 1) in Order to Enable Program Mode EN2 Should Be Low (EN2 = 0) in Order to Enable Program Mode SPD Low (SPD = 0, Default) for 250sps, High (SPD = 1) for 1ksps Output Rate SLP Low (SLP = 0, Default) for Nap Mode, High (SLP = 1) for Sleep Mode Where Both Reference and Converter are Powered Down *SDI May Also Be Tied Directly to GND to Set Output Rate to 250sps or VDD to Set Output Rate to 1ksps. Sleep Mode is Disabled if SDI is Tied to GND or VDD. Table 1. LTC2470/LTC2472 Output Data Format SINGLE ENDED INPUT VIN (LTC2470) DIFFERENTIAL INPUT VOLTAGE VIN+ – VIN– (LTC2472) D15 (MSB) D14 D13 D12...D2 D1 D0 (LSB) CORRESPONDING DECIMAL VALUE ≥VREF ≥VREF 1 1 1 1 1 1 65535 VREF – 1LSB VREF – 1LSB 1 1 1 1 1 0 65534 0.75 • VREF 0.5 • VREF 1 1 0 0 0 0 49152 0.75 • VREF – 1LSB 0.5 • VREF – 1LSB 1 0 1 1 1 1 49151 0.5 • VREF 0 1 0 0 0 0 0 32768 0.5 • VREF – 1LSB –1LSB 0 1 1 1 1 1 32767 0.25 • VREF –0.5 • VREF 0 1 0 0 0 0 16384 0.25 • VREF – 1LSB –0.5 • VREF – 1LSB 0 0 1 1 1 1 16383 0 ≤ –VREF 0 0 000 0 0 D15 LSB SDO SCK D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D0 D1 24702 F05 t1 t3 tKQ tlSCK thSCK t2 CS MSB SDI EN2 SPD SLP DON’T CARE t4 t5 EN1 Figure 5. Data Input/Output Timing |
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