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LTC3855IFEPBF Datasheet(PDF) 10 Page - Linear Technology |
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LTC3855IFEPBF Datasheet(HTML) 10 Page - Linear Technology |
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10 / 44 page  LTC3855 0 3855f pin FuncTions BOOST1,BOOST2(Pin32,Pin24/Pin29,Pin21):Boosted Floating Driver Supplies. The (+) terminal of the bootstrap capacitors connect to these pins. These pins swing from a diode voltage drop below INTVCC up to VIN + INTVCC. TG1, TG2 (Pin 33, Pin 23/Pin 30, Pin 20): Top Gate Driver Outputs. These are the outputs of floating drivers with a voltage swing equal to INTVCC superimposed on the switch nodes voltages. SW1, SW2 (Pin 34, Pin 22/Pin 31, Pin 19): Switch Node Connections to Inductors. Voltage swing at these pins is from a Schottky diode (external) voltage drop below ground to VIN. PHASMD (Pin 36/Pin 33): This pin can be tied to SGND, tied to INTVCC or left floating. This pin determines the relative phases between the internal controllers as well as the phasing of the CLKOUT signal. See Table 1 in the Operation section. CLKOUT(Pin35/Pin32):Clockoutputwithphasechange- able by PHASMD to enable usage of multiple LTC3855 in multiphase systems. MODE/PLLIN (Pin 37/Pin 34): This is a dual purpose pin. When external frequency synchronization is not used, this pin selects the operating mode. The pin can be tied to SGND, tied to INTVCC or left floating. SGND enables forced continuous mode. INTVCC enables pulse-skipping mode.FloatingenablesBurstModeoperation.Forexternal sync, apply a clock signal to this pin. Both channels will go into forced continuous mode and the internal PLL will synchronize the internal oscillator to the clock. The PLL compensation network is integrated into the IC. FREQ (Pin 38/Pin 35): There is a precision 10µA current flowing out of this pin. A resistor to ground sets a voltage which in turn programs the frequency. Alternatively, this pin can be driven with a DC voltage to vary the frequency of the internal oscillator. SGND (Exposed Pad Pin 39/ Pin 4, Exposed Pad Pin 41): Signal Ground. All small-signal components and com- pensation components should connect to this ground, which in turn connects to PGND at one point. Exposed pad must be soldered to PCB, providing a local ground for the control components of the IC, and be tied to the PGND pin under the IC. (FE38/UJ40) |
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