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LTC2704IGW-16PBF Datasheet(PDF) 5 Page - Linear Technology

Part # LTC2704IGW-16PBF
Description  Quad 12-, 14- and 16-Bit Voltage Output SoftSpan DACs with Readback
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Manufacturer  LINER [Linear Technology]
Direct Link  http://www.linear.com
Logo LINER - Linear Technology

LTC2704IGW-16PBF Datasheet(HTML) 5 Page - Linear Technology

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LTC2704
5
2704fb
The
denotes specifications which apply over the full operating temperature
range, otherwise specifications are at TA = 25°C.
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime. Refer to Operation Section for proper power supply
sequencing.
Note 2: The notation V+ is used to denote both V+1 and V+2 when the same
voltage is applied to both pins.
Note 3: Guaranteed by design, not subject to test.
Note 4: Measured in unipolar 0V to 5V mode.
Note 5: When using SRO, maximum SCK frequency fMAX is limited by SRO
propagation delay as follows:
fMAX =
1
2t9 + tS
(
)
, where ts is the setup time of the receiving device.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
IIN
Digital Input Current
0.001
±1
μA
CIN
Digital Input Capacitance
VIN = 0V (Note 3)
5pF
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VDD = 4.5V to 5.5V
t1
SDI Valid to SCK Setup
7ns
t2
SDI Valid to SCK Hold
7ns
t3
SCK High Time
11
ns
t4
SCK Low Time
11
ns
t5
CS/LD Pulse Width
9ns
t6
LSB SCK High to CS/LD High
0ns
t7
CS/LD Low to SCK Positive Edge
12
ns
t8
CS/LD High to SCK Positive Edge
12
ns
t9
SRO Propagation Delay
CLOAD = 10pF
18
ns
t10
CLR Pulse Width
50
ns
t11
LDAC Pulse Width
15
ns
t12
CLR Low to RFLAG Low
CLOAD = 10pF (Note 3)
50
ns
t13
CS/LD High to RFLAG High
CLOAD = 10pF (Note 3)
40
ns
SCK Frequency
50% Duty Cycle (Note 5)
40
MHz
VDD = 2.7V to 3.3V
t1
SDI Valid to SCK Setup
9ns
t2
SDI Valid to SCK Hold
9ns
t3
SCK High Time
15
ns
t4
SCK Low Time
15
ns
t5
CS/LD Pulse Width
12
ns
t6
LSB SCK High to CS/LD High
0ns
t7
CS/LD Low to SCK Positive Edge
12
ns
t8
CS/LD High to SCK Positive Edge
12
ns
t9
SRO Propagation Delay
CLOAD = 10pF
26
ns
t10
CLR Pulse Width
90
ns
t11
LDAC Pulse Width
20
ns
t12
CLR Low to RFLAG Low
CLOAD = 10pF
70
ns
t13
CS/LD High to RFLAG High
CLOAD = 10pF
60
ns
SCK Frequency
50% Duty Cycle (Note 5)
25
MHz
TIMING CHARACTERISTICS
ELECTRICAL CHARACTERISTICS The denotes specifications which apply over the full operating
temperature range, otherwise specifications are TA = 25°C, V+1 = V+2 = 15V, V= –15V, VDD = 5V, REF1 = REF2 = 5V, AGND = AGNDx =
REFG1 = REFG2 = GND = 0V.


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