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IS61DDB22M36-300M3LI Datasheet(PDF) 11 Page - Integrated Silicon Solution, Inc |
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IS61DDB22M36-300M3LI Datasheet(HTML) 11 Page - Integrated Silicon Solution, Inc |
11 / 25 page Integrated Silicon Solution, Inc. 11 Rev. B 11/10 /09 72 Mb (2M x 36 & 4M x 18) DDR-II (Burst of 2) CIO Synchronous SRAMs Recommended DC Operating Conditions (TA = 0 to +70°C) Parameter Symbol Minimum Typical Maximum Units Notes Supply voltage VDD 1.8 - 5% 1.8 + 5% V 1 Output driver supply voltage VDDQ 1.4 1.9 V 1 Input high voltage VIH VREF +0.1 VDDQ + 0.3 V V 1, 2 1, 3 Input low voltage VIL -0. 3 VREF - 0.1 Input reference voltage VREF 0.68 0.95 V 1, 5 Clocks signal voltage VIN - CLK -0. 3 VDDQ + 0.3 V 1, 4 1. All voltages are referenced to VSS. All VDD, VDDQ, and VSS pins must be connected. 2. VIH(Max) AC = See 0vershoot and Undershoot Timings. 3. VIL(Min) AC = See 0vershoot and Undershoot Timings. 4. VIN-CLK specifies the maximum allowable DC excursions of each clock (K, K, C, and C). 5. Peak-to-peak AC component superimposed on VREF may not exceed 5% of VREF. 0vershoot and Undershoot Timings PBGA Thermal Characteristics Item Symbol Rating Units Thermal resistance junction to ambient (airflow = 1m/s) R ΘJA 18.6 ° C/W Thermal resistance junction to case R ΘJC 4.3 ° C/W Thermal resistance junction to pins R ΘJB 1.77 ° C/W VDDQ 20% Min Cycle Time VDDQ+0.6V GND-0.6V GND 20% Min Cycle Time Overshoot Timing Undershoot Timing VIH(Max) AC VIL(Min) AC |
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