6

Integrated Silicon Solution, Inc. — www.issi.com

Rev. C

03/21/2008

IS61C25616AL

IS61C25616AS

IS64C25616AL

IS64C25616AS

-10

-12

-25

Symbol

Parameter

Min. Max.

Min.

Max.

Min.

Max.

Unit

Read Cycle Time

10

—

12

—

25

—

ns

Address Access Time

—

10

—

12

—

25

ns

Output Hold Time

3

—

3

—

3

—

ns

CE Access Time

—

10

—

12

—

25

ns

OE Access Time

—

5

—

6

—

15

ns

OE to High-Z Output

0

5

0

6

0

8

ns

OE to Low-Z Output

0

—

0

—

2

—

ns

CE to High-Z Output

0

5

0

6

0

8

ns

CE to Low-Z Output

2

—

2

—

2

—

ns

LB, UB Access Time

—

5

—

6

—

25

ns

LB, UB to High-Z Output

0

5

0

6

0

8

ns

LB, UB to Low-Z Output

0

—

0

—

0

—

ns

AC TEST CONDITIONS

Parameter

Unit

Input Pulse Level

0V to 3.0V

Input Rise and Fall Times

3 ns

Input and Output Timing

1.5V

and Reference Level

Output Load

See Figures 1 and 2

480

Ω

30 pF

Including

jig and

scope

255

Ω

OUTPUT

5V

480

Ω

5 pF

Including

jig and

scope

255

Ω

OUTPUT

5V

Notes:

1. Test conditions assume signal transition times of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0

to 3.0V and output loading specified in Figure 1.

2. Tested with the load in Figure 2. Transition is measured ±500 mV from steady-state voltage. Not 100% tested.

3. Not 100% tested.

Figure 1

Figure 2

AC TEST LOADS