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SC9S12XS64J1M Datasheet(PDF) 76 Page - Freescale Semiconductor, Inc |
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SC9S12XS64J1M Datasheet(HTML) 76 Page - Freescale Semiconductor, Inc |
76 / 736 page Port Integration Module (S12XSPIMV1) S12XS Family Reference Manual, Rev. 1.09 76 Freescale Semiconductor 2.3.9 Port E Data Direction Register (DDRE) Table 2-8. PORTE Register Field Descriptions Field Description 7 PE Port E general purpose input/output data—Data Register, ECLKX2 output, XCLKS input When not used with the alternative function, the associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered pin input state is read. • The ECLKX2 output function takes precedence over the general purpose I/O function if enabled. • The external clock selection feature (XCLKS) is only active during RESET=0 6-5, 3-2 PE Port E general purpose input/output data—Data Register The associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered pin input state is read. 4 PE Port E general purpose input/output data—Data Register, ECLK output When not used with the alternative function, the associated pin can be used as general purpose I/O. In general purpose output mode the register bit value is driven to the pin. If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered pin input state is read. • The ECLK output function takes precedence over the general purpose I/O function if enabled. 1 PE Port E general purpose input data and interrupt—Data Register, IRQ input. This pin can be used as general purpose and IRQ input. 0 PE Port E general purpose input data and interrupt—Data Register, XIRQ input. This pin can be used as general purpose and XIRQ input. Address 0x0009 (PRR) Access: User read/write1 1 Read: Anytime. The data source depends on the data direction value. Write: Anytime. 76543210 R DDRE7 DDRE6 DDRE5 DDRE4 DDRE3 DDRE2 00 W Reset 00000000 = Unimplemented or Reserved Figure 2-7. Port E Data Direction Register (DDRE) |
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