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SC9S12XS64J1M Datasheet(PDF) 34 Page - Freescale Semiconductor, Inc |
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SC9S12XS64J1M Datasheet(HTML) 34 Page - Freescale Semiconductor, Inc |
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34 / 736 page  Table 1-6 provides a pin out summary listing the availability and functionality of individual pins for each package option. Table 1-6. Pin-Out Summary1 Package Terminal Function Power Supply Internal Pull Resistor Description LQFP 112 QFP 80 LQFP 64 Pin 2nd Func. 3rd Func. 4th Func. 5th Func. CTRL Reset State 1 1 1 PP3 KWP3 PWM3 — — VDDX PERP/PPSP Disabled Port P I/O, interrupt, PWM channel 2 2 2 PP2 KWP2 PWM2 IOC2 TXD1 VDDX PERP/PPSP Disabled Port P I/O, interrupt, PWM/TIM channel, TXD of SCI1 3 3 3 PP1 KWP1 PWM1 IOC1 — VDDX PERP/PPSP Disabled Port P I/O, interrupt, PWM/TIM channel 4 4 4 PP0 KWP0 PWM0 IOC0 RXD1 VDDX PERP/PPSP Disabled Port P I/O, interrupt, PWM/TIM channel, RXD of SCI1 5 - - PK3 — — — — VDDX PUCR Up Port K I/O 6 - - PK2 — — — — VDDX PUCR Up Port K I/O 7 - - PK1 — — — — VDDX PUCR Up Port K I/O 8 - - PK0 — — — — VDDX PUCR Up Port K I/O 9 5 5 PT0 IOC0 — — — VDDX PERT/PPST Disabled Port T I/O, TIM channel 10 6 6 PT1 IOC1 — — — VDDX PERT/PPST Disabled Port T I/O, TIM channel 11 7 7 PT2 IOC2 — — — VDDX PERT/PPST Disabled Port T I/O, TIM channel 12 8 8 PT3 IOC3 — — — VDDX PERT/PPST Disabled Port T I/O, TIM channel 13 9 9 VDDF — — — — — — — — 14 10 10 VSS1 — — — — — — — — 15 11 11 PT4 IOC4 PWM4 — — VDDX PERT/PPST Disabled Port T I/O, PWM/TIM channel |
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