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SC9S12XS128J1V Datasheet(PDF) 99 Page - Freescale Semiconductor, Inc |
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SC9S12XS128J1V Datasheet(HTML) 99 Page - Freescale Semiconductor, Inc |
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99 / 736 page  Port Integration Module (S12XSPIMV1) S12XS Family Reference Manual, Rev. 1.09 Freescale Semiconductor 99 2.3.40 Port M Wired-Or Mode Register (WOMM) 2.3.41 Module Routing Register (MODRR) This register configures the re-routing of SCI1 and SPI0 on alternative ports. Address 0x0256 Access: User read/write1 1 Read: Anytime. Write: Anytime. 76543210 R WOMM7 WOMM6 WOMM5 WOMM4 WOMM3 WOMM2 WOMM1 WOMM0 W Reset 00000000 Figure 2-38. Port M Wired-Or Mode Register (WOMM) Table 2-36. WOMM Register Field Descriptions Field Description 7-0 WOMM Port M wired-or mode—Enable open-drain functionality on output pin This bit configures an output pin as wired-or (open-drain) or push-pull. In wired-or mode a logic “0” is driven active low while a logic “1” remains undriven. This allows a multipoint connection of several serial modules. The bit has no influence on pins used as input. 1 Output buffer operates as open-drain output. 0 Output buffer operates as push-pull output. Address 0x0257 Access: User read/write1 1 Read: Anytime. Write: Anytime. 76543210 R MODRR7 MODRR6 0 MODRR4 0000 W Routing Option SCI1 SCI1 — SPI0 ———— Reset 00000000 = Unimplemented or Reserved Figure 2-39. Module Routing Register (MODRR) Table 2-37. SCI1 Routing MODRRx Related Pins 7 6 TXD RXD |
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