SC72131

HANGZHOU SILAN MICROELECTRONICS CO.,LTD

REV:2.0

2004.08.03

Http: www.silan.com.cn

Page 6 of 11

FM

MODE

Input pin

Set divisor

Actual divisor: N

Input frequency range (MHz)

1

*

FMIN

272 to 65535

Twice the set value

10 to 160

0

1

AMIN

272 to 65535

The set value

2 to 40

0

0

AMIN

4 to 4095

The set value

0.5 to 10

Note: * Don’

t care.

1.IF Counter Structure

The SC72131 IF counter section consists of input amp, a gate time control circuit and a 20bit binary counter.

The result, i.e., the counter’

s msb, can be read serially from the Dout pin.

G1

G0

Gate time (GT) (ms)

Wait time (ms)

0

0

4

3 ~ 4

0

1

8

3 ~ 4

1

0

32

7 ~ 8

1

1

64

7 ~ 8

2. IF Counter Operation

Note: 1. IFIN input have built-in amp. Data are input by capacitor coupling.

2. Before starting the IF count, the IF counter must be reset in advance by setting CTE in the serial data to 0.

3. The IF count is started by changing the CTE bit in the serial data from 0 to 1. The serial data is latched

by the SC72131 when the CE pin is dropped from high to low.

4.The IF signal must be supplied to the IFIN pin in the period between the point the CE pin goes low and

the end of the wait time at the latest.

5. The value of the IF counter at the end of the Gate-Time must be read out during the period that CTE is

1. This is because the IF counter is reset when CTE is set to 0.

6. When operating the IF counter, the control microprocessor must first check the state of the IF-IC SD

(station detect) signal and only after determining that the SD signal is present turn on IF buffer output