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SC73P2602SA Datasheet(PDF) 9 Page - Silan Microelectronics Joint-stock |
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SC73P2602SA Datasheet(HTML) 9 Page - Silan Microelectronics Joint-stock |
9 / 28 page 9. CF Carry flag. 10. SF Status flag. jump instruction is only effective only when SF=1. SF is 1 after reset. 11. CH0, CH1, CL0, CL1 CH0, CH1, CL0 and CL1 are carrier level control registers for controlling the high and low level to (CH+1)/Fosc and(CL+1)/Fosc. Where, Fosc is oscillator frequency, CH0 and CH1 are higher 4-bit and lower 4-bit of CH respectively, while CL0 and CL1 are higher 4-bit and lower 4-bit of CL. 12. LL, LH 4-bit LL register, lower 4-bit of RAM addressing pointer, can be used as general register as well. 4-bit LH register, LH[0] is the MSB of RAM addressing pointer. Note: LH[3] is LVD flag and it is “0” when VDD< VLVD, otherwise it is “1”. Typical application: this bit is used for judging whether the circuit is working in low-voltage area to avoid incomplete code transmission. Typical value for is VLVD 1.7V. 13. PR (PR, PR2) HANGZHOU SILAN MICROELECTRONICS CO.,LTD REV:1.1 2009.11.19 Http: //www.silan.com.cn The port mode register, which specifies the input mode or output mode of the I/O port, is 4-bit write-only. When PR=1, the corresponding port is set to output mode. PR=0, it is set to input mode. The execution of the HOLD instruction won’t affect the I/O modes of operation. When reset, PR=0. The port is in input mode. Page 9 of 28 |
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