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SC9S12XS64J1CR Datasheet(PDF) 62 Page - Freescale Semiconductor, Inc |
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SC9S12XS64J1CR Datasheet(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 736 page  Port Integration Module (S12XSPIMV1) S12XS Family Reference Manual, Rev. 1.09 62 Freescale Semiconductor 2.3 Memory Map and Register Definition This section provides a detailed description of all Port Integration Module registers. P PP7 PWM7 I/O Pulse Width Modulator channel 7; emergency shut-down GPIO GPIO/KWP7 I/O General purpose; with interrupt PP[6:3] PWM[6:3] O Pulse Width Modulator channel 6 - 3 GPIO/KWP[6:3] I/O General purpose; with interrupt PP2 PWM2 O Pulse Width Modulator channel 2 (IOC2) I/O Timer Channel 2 (TXD1) O Serial Communication Interface 1 transmit pin GPIO/KWP2 I/O General purpose; with interrupt PP1 PWM1 O Pulse Width Modulator channel 1 (IOC1) I/O Timer Channel 1 GPIO/KWP1 I/O General purpose; with interrupt PP0 PWM0 O Pulse Width Modulator channel 0 (IOC0) I/O Timer Channel 0 (RXD1) I Serial Communication Interface 1 transmit pin GPIO/KWP0 I/O General purpose; with interrupt H PH[7:0] GPIO/KWH[7:0] I/O General purpose; with interrupt GPIO J PJ[7:6] GPIO/KWJ[7:6] I/O General purpose; with interrupt GPIO PJ[1:0] GPIO/KWJ[1:0] I/O General purpose; with interrupt AD PAD[15:0] GPIO I/O General purpose GPIO AN[15:0] I ATD analog 1 Signals in brackets denote alternative module routing pins. 2 Function active when RESET asserted. Table 2-1. Pin Functions and Priorities (continued) Port Pin Name Pin Function & Priority1 I/O Description Pin Function after Reset |
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