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IS24C128-3GI Datasheet(PDF) 3 Page - Integrated Silicon Solution, Inc

Part # IS24C128-3GI
Description  128K-bit 2-WIRE SERIAL CMOS EEPROM
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Manufacturer  ISSI [Integrated Silicon Solution, Inc]
Direct Link  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS24C128-3GI Datasheet(HTML) 3 Page - Integrated Silicon Solution, Inc

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Integrated Silicon Solution, Inc. — www.issi.com
3
Rev. C
05/08/07
IS24C128
PIN DESCRIPTIONS
A0-A1
Address Inputs
SDA
Serial Address/Data I/O
SCL
Serial Clock Input
WP
Write Protect Input
Vcc
Power Supply
NC
No Connect
GND
Ground
SCL
This input clock pin is used to synchronize the data
transfer to and from the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses
and data into and out of the device. The SDA pin is an open
PIN CONFIGURATION
8-Pin DIP and SOIC
drain output and can be wire Or'ed with other open drain
or open collector outputs. The SDA bus
requires a pullup
resistor to Vcc.
A0, A1
The A0, and A1 are the device address inputs that are
hardwired or left not connected for hardware compatibility
with the 24C32/64. When pins are hardwired, as many as
four 128K devices may be addressed on a single bus
system. When the pins are not hardwired, the default A0
and A1 are zero.
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc
the entire array becomes Write Protected (Read only).
When WP is tied to GND or left floating, normal read/write
operations are allowed to the device.
1
2
3
4
8
7
6
5
A0
A1
NC
GND
VCC
WP
SCL
SDA


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