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MC10XS3412DPNA Datasheet(PDF) 37 Page - Freescale Semiconductor, Inc

Part No. MC10XS3412DPNA
Description  Quad High Side Switch (Dual 10 mOhm, Dual 12 mOhm)
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Maker  FREESCALE [Freescale Semiconductor, Inc]
Homepage  http://www.freescale.com
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MC10XS3412DPNA Datasheet(HTML) 37 Page - Freescale Semiconductor, Inc

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Analog Integrated Circuit Device Data
Freescale Semiconductor
37
10XS3412
FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
For the selected output, a logic [0] on bit D5 (DIR_DIS_s)
will enable the output for direct control. A logic [1] on bit D5
will disable the output from direct control (in this case, the
output is only controlled by On bit).
D4:D3 bits (SR1_s and SR0_s) are used to select the high
or medium or low speed slew rate for the selected output, the
default value [00] corresponds to the medium speed slew rate
(Table 13).
Incoming message bits D2:D0 reflect the desired output
that will be delayed of predefined PWM clock rising edges
number, as shown Table 8, page 29 (only available for
PWM_en bit is set to logic [1]).
ADDRESS A1A0011—OUTPUT CONFIGURATION
REGISTER (CONFR1_S)
The CONFR1_s register allows the MCU to configure
corresponding output fault management through the SPI.
Each output “s” is independently selected for configuration
based on the state of the D14:D13 bits (Table 12).
A logic [1] on bit D6 (RETRY_unlimited_s) disables the
autoretry counter for the selected output, the default value [0]
corresponds to enable auto-retry feature without time
limitation.
A logic [1] on bit D5 (RETRY_dis_s) disables the auto-
retry for the selected output, the default value [0] corresponds
to enable this feature.
A logic [1] on bit D4 (OS_dis_s) disables the output hard
shorted to VPWR protection for the selected output, the
default value [0] corresponds to enable this feature.
A logic [1] on bit D3 (OLON_dis_s) disables the ON output
open-load detection for the selected output, the default value
[0] corresponds to enable this feature (Table 14).
A logic [1] on bit D2 (OLOFF_dis_s) disables the OFF
output open-load detection for the selected output, the
default value [0] corresponds to enable this feature.
A logic [1] on bit D1 (OLLED_en_s) enables the ON output
open-load detection for LEDs for the selected output, the
default value [0] corresponds to ON output open-load
detection is set for bulbs (Table 14).
A logic [1] on bit D0 (CSNS_ratio_s) selects the high ratio
on the CSNS pin for the corresponding output. The default
value [0] is the low ratio (Table 15).
ADDRESS A1A0100—OUTPUT OVER-CURRENT
REGISTER (OCR)
The OCR_s register allows the MCU to configure
corresponding output over-current protection through the
SPI. Each output “s” is independently selected for
configuration based on the state of the D14:D13 bits
(Table 12).
A logic [1] on bit D8 (Xenon_s) enables the bulb over-
current profile, as described Figure 13.
Table 13. Slew Rate Speed Selection
SR1_s (D4)
SR0_s (D3)
Slew Rate Speed
0
0
medium (default)
0
1
low
1
0
high
1
1
Not used
Table 14. ON Open-load Selection
OLON_dis_s (D3) OLLED_en_s (D1) ON OpenLoad detection
0
0
enable with bulb threshold
(default)
0
1
enable with LED threshold
1
X
disable
Table 15. Current Sense Ratio Selection
CSNS_high_s (D0)
Current Sense Ratio
0
CRS0 (default)
1
CRS1


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