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ADN2531ACPZ-WP Datasheet(PDF) 11 Page - Analog Devices

Part No. ADN2531ACPZ-WP
Description  11.3 Gbps, Active Back-Termination, Differential Laser Diode Driver
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Maker  AD [Analog Devices]
Homepage  http://www.analog.com
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ADN2531ACPZ-WP Datasheet(HTML) 11 Page - Analog Devices

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ADN2531
Rev. 0 | Page 11 of 20
THEORY OF OPERATION
ADN2531
DATAP
DATAN
C
C
50
50
DATA SIGNAL SOURCE
As shown in Figure 1, the ADN2531 consists of an input stage and
two voltage-controlled current sources for bias and modulation.
The bias current is available at the IBIAS pin. It is controlled by the
voltage at the BSET pin and can be monitored at the IBMON pin.
The differential modulation current is available at the IMODP
and IMODN pins. It is controlled by the voltage at the MSET pin.
The output stage implements the active back-termination
circuitry for proper transmission line matching and power
consumption reduction. The ADN2531 can drive a load with
differential resistance ranging from 5 Ω to 140 Ω. The excellent
back-termination in the ADN2531 absorbs signal reflections
from the TOSA end of the output transmission lines, enabling
excellent optical eye quality to be achieved even when the
TOSA end of the output transmission lines is significantly
misterminated.
Figure 24. AC Coupling the Data Source to the ADN2531 Data Inputs
BIAS CURRENT
The bias current is generated internally using a voltage-to-current
converter consisting of an internal operational amplifier and a
transistor, as shown in Figure 25.
GND
200
800
2
VCC
IBMON
BSET
IBMON
ADN2531
IBIAS
200
IBIAS
INPUT STAGE
The input stage of the ADN2531 converts the data signal applied
to the DATAP and DATAN pins to a level that ensures proper
operation of the high speed switch. The equivalent circuit of the
input stage is shown in Figure 23.
VCC
50
50
VCC
DATAP
DATAN
Figure 25. Voltage-to-Current Converter Used to Generate IBIAS
The BSET to IBIAS voltage-to-current conversion factor is set
at 100 mA/V by the internal resistors, and the bias current is
monitored at the IBMON pin using a current mirror with a gain
equal to 1/100. By connecting a 750 Ω resistor between IBMON
and GND, the bias current can be monitored as a voltage across
the resistor. A low temperature coefficient precision resistor must
be used for the IBMON resistor (RIBMON). Any error in the value
of RIBMON due to tolerances or drift in its value over temperature
contributes to the overall error budget for the IBIAS monitor voltage.
Figure 23. Equivalent Circuit of the Input Stage
The DATAP and DATAN pins are terminated internally with a
100 Ω differential termination resistor. This minimizes signal
reflections at the input that could otherwise lead to degradation
in the output eye diagram. It is not recommended to drive the
ADN2531 with single-ended data signal sources.
If the IBMON voltage is being connected to an ADC for analog-
to-digital conversion, RIBMON should be placed close to the ADC to
minimize errors due to voltage drops on the ground plane. See the
Design Example section for example calculations of the accuracy of
the IBIAS monitor as a percentage of the nominal IBIAS value.
The ADN2531 input stage must be ac-coupled to the signal source
to eliminate the need for matching between the common-mode
voltages of the data signal source and the input stage of the driver
(see Figure 24). The ac coupling capacitors should have an
impedance less than 50 Ω over the required frequency range.
Generally, this is achieved using 10 nF to 100 nF capacitors, for
more than 1 Gbps operation.


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