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SC9S12HY64J0MLL Datasheet(PDF) 98 Page - Freescale Semiconductor, Inc |
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SC9S12HY64J0MLL Datasheet(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 790 page  Port Integration Module (S12HYPIMV1) MC9S12HY/HA-Family Reference Manual, Rev. 1.04 98 Freescale Semiconductor 2.3.40 Port H Input Register (PTIH) 2.3.41 Port H Data Direction Register (DDRH) Address 0x0261 Access: User read1 1 Read: Anytime. Write:Never, writes to this register have no effect. 76543210 R PTIH7 PTIH6 PTIH5 PTIH4 PTIH3 PTIH2 PTIH1 PTIH0 W Reset uuuuuuuu = Unimplemented or Reserved u = Unaffected by reset Figure 2-38. Port H Input Register (PTIH) Table 2-37. PTIH Register Field Descriptions Field Description 7-0 PTIH Port H input data— This register always reads back the buffered state of the associated pins. This can also be used to detect overload or short circuit conditions on output pins. Address 0x0262 Access: User read/write1 1 Read: Anytime. Write: Anytime. 76543210 R DDRH7 DDRH6 DDRH5 DDRH4 DDRH3 DDRH2 DDRH1 DDRH0 W Reset 00000000 Figure 2-39. Port H Data Direction Register (DDRH) |
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