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SC9S12HY64J0VLH Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc |
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SC9S12HY64J0VLH Datasheet(HTML) 21 Page - Freescale Semiconductor, Inc |
21 / 790 page Device Overview MC9S12HY/HA-Family MC9S12HY/HA-Family Reference Manual, Rev. 1.04 Freescale Semiconductor 21 NOTE Reserved register space shown in Table 1-2 is not allocated to any module. This register space is reserved for future use. Writing to these locations has no effect. Read access to these locations returns zero. Figure 1-2, Figure 1-3 and Figure 1-4 shows S12HY/HA family CPU and BDM local address translation to the global memory map. It indicates also the location of the internal resources in the memory map. Table 1-3 shows the mapping of D-Flash and unpaged P-Flash memory. The whole 256K global memory space is visible through the P-Flash window located in the 64K local memory map located at 0x8000 − 0xBFFF using the PPAGE register. Table 1-4. MC9S12HY/MC9S12HA Derivatives 0x0300–0x03FF Reserved 256 Table 1-3. MC9S12HY/MC9S12HA -Family mapping for D-Flash and unpaged P-Flash Local 64K memory map Global 256K memory map D-Flash 0x0400 - 0x13FF 0x0_4400 - 0x0_53FF P-Flash 0x1400 - 0x2FFF(1) 1. 0x2FFF for MC9S12HY64 because of 4K RAM size 0x3_1400 -0x3_2FFF(2) 2. 0x3_2FFF for MC9S12HY64 because of 4K RAM size 0x4000 - 0x7FFF 0x3_4000 - 0x3_7FFF 0xC000 - 0xFFFF 0x3_C000 - 0x3_FFFF Feature MC9S12HY32 MC9S12HA32 MC9S12HY48 MC9S12HA48 MC9S12HY64 MC9S12HA64 P-Flash size 32KB 48KB 64KB PF_LOW PPAGES 0x3_8000 0x0E - 0x0F 0x3_4000 0x0D - 0x0F 0x3_0000 0x0C - 0x0F RAMSIZE 2KB 4KB 4KB RAM_LOW 0x0_3800 0x0_3000 0x0_3000 Table 1-2. Device Register Memory Map (Sheet 2 of 2) Address Module Size (Bytes) |
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