ADAU1381 datasheet(51/84 Pages) AD

Part #	ADAU1381

Description	Low Noise Stereo Codec with Enhanced Recording and Playback Processing

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Manufacturer	AD [Analog Devices]

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ADAU1381

Rev. 0| Page 51 of 84

Register 16399 (0x400F), Record Gain Right PGA

The record gain right PGA control register controls the right

channel input PGA. This register configures the input for either

differential or single-ended signals and sets the right channel

input recording volume.

Bits[7:5], Right Input Gain

These bits set the right channel analog microphone input PGA gain.

Bit 2, Single-Ended Right Input Enable

If this bit is high (enabled), a single-ended input can be input on

the RMIC pin and gained by the PGA. The positive differential

input pin (RMICP) is disabled, and the complementary input of

the PGA is switched to common mode.

Bit 1, Record Path Right Mute

This bit mutes the entire right channel input PGA.

Bit 0, Right PGA Enable

This bit enables the right channel PGA.

Table 38. Record Gain Right PGA Register

Bits

Description

Default

[7:5]

Right input gain

000

000: 0 dB

001: 6 dB

010: 10 dB

011: 14 dB

100: 17 dB

101: 20 dB

110: 26 dB

111: 32 dB

[4:3]

Reserved

2

Single-ended right input enable

0

0: disabled

1: enabled

1

Record path right mute

0

0: muted

1: unmuted

0

Right PGA enable

0

0: disabled

1: enabled

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