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S9S08SG16E1CTGR Datasheet(PDF) 87 Page - Freescale Semiconductor, Inc |
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S9S08SG16E1CTGR Datasheet(HTML) 87 Page - Freescale Semiconductor, Inc |
87 / 328 page Chapter 6 Parallel Input/Output Control MC9S08SG32 Data Sheet, Rev. 7 Freescale Semiconductor 87 6.6.2.5 Port B Drive Strength Selection Register (PTBDS) 6.6.2.6 Port B Interrupt Status and Control Register (PTBSC) 76543210 R PTBDS7 PTBDS6 PTBDS5 PTBDS4 PTBDS3 PTBDS2 PTBDS1 PTBDS0 W Reset: 00000000 Figure 6-15. Drive Strength Selection for Port B Register (PTBDS) Table 6-14. PTBDS Register Field Descriptions Field Description 7:0 PTBDS[7:0] Output Drive Strength Selection for Port B Bits — Each of these control bits selects between low and high output drive for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect. 0 Low output drive strength selected for port B bit n. 1 High output drive strength selected for port B bit n. 76543210 R 0000 PTBIF 0 PTBIE PTBMOD W PTBACK Reset: 00000000 Figure 6-16. Port B Interrupt Status and Control Register (PTBSC) Table 6-15. PTBSC Register Field Descriptions Field Description 3 PTBIF Port B Interrupt Flag — PTBIF indicates when a Port B interrupt is detected. Writes have no effect on PTBIF. 0 No Port B interrupt detected. 1 Port B interrupt detected. 2 PTBACK Port B Interrupt Acknowledge — Writing a 1 to PTBACK is part of the flag clearing mechanism. PTBACK always reads as 0. 1 PTBIE Port B Interrupt Enable — PTBIE determines whether a port B interrupt is enabled. 0 Port B interrupt request not enabled. 1 Port B interrupt request enabled. 0 PTBMOD Port B Detection Mode — PTBMOD (along with the PTBES bits) controls the detection mode of the port B interrupt pins. 0 Port B pins detect edges only. 1 Port B pins detect both edges and levels. |
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