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S9S08SG16E1CTGR Datasheet(PDF) 47 Page - Freescale Semiconductor, Inc |
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S9S08SG16E1CTGR Datasheet(HTML) 47 Page - Freescale Semiconductor, Inc |
47 / 328 page Chapter 4 Memory MC9S08SG32 Data Sheet, Rev. 7 Freescale Semiconductor 47 4.5.1 Features Features of the FLASH memory include: • FLASH size — MC9S08SG32: 32,768 bytes (64 pages of 512 bytes each) — MC9S08SG16: 16,384 bytes (32 pages of 512 bytes each) • Single power supply program and erase • Command interface for fast program and erase operation • Up to 100,000 program/erase cycles at typical voltage and temperature • Flexible block protection and vector redirection • Security feature for FLASH and RAM • Auto power-down for low-frequency read accesses 4.5.2 Program and Erase Times Before any program or erase command can be accepted, the FLASH clock divider register (FCDIV) must be written to set the internal clock for the FLASH module to a frequency (fFCLK) between 150 kHz and 200 kHz (see Section 4.7.1, “FLASH Clock Divider Register (FCDIV)”). This register can be written only once, so normally this write is done during reset initialization. FCDIV cannot be written if the access error flag, FACCERR in FSTAT, is set. The user must ensure that FACCERR is not set before writing to the FCDIV register. One period of the resulting clock (1/fFCLK) is used by the command processor to time program and erase pulses. An integer number of these timing pulses are used by the command processor to complete a program or erase command. Table 4-5 shows program and erase times. The bus clock frequency and FCDIV determine the frequency of FCLK (fFCLK). The time for one cycle of FCLK is tFCLK = 1/fFCLK. The times are shown as a number of cycles of FCLK and as an absolute time for the case where tFCLK =5 μs. Program and erase times shown include overhead for the command state machine and enabling and disabling of program and erase voltages. Table 4-5. Program and Erase Times Parameter Cycles of FCLK Time if FCLK = 200 kHz Byte program 9 45 μs Byte program (burst) 4 20 μs1 1 Excluding start/end overhead Page erase 4000 20 ms Mass erase 20,000 100 ms |
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