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S9S08SG16E1JTLR Datasheet(PDF) 12 Page - Freescale Semiconductor, Inc |
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S9S08SG16E1JTLR Datasheet(HTML) 12 Page - Freescale Semiconductor, Inc |
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12 / 328 page  MC9S08SG32 Data Sheet, Rev. 7 12 Freescale Semiconductor Section Number Title Page 8.5 External Signal Description .......................................................................................................... 117 8.6 Memory Map ................................................................................................................................ 117 8.6.1 Register Descriptions ...................................................................................................... 117 8.7 Functional Description .................................................................................................................. 119 Chapter 9 Analog-to-Digital Converter (S08ADC10V1) 9.1 Introduction ................................................................................................................................... 121 9.1.1 Channel Assignments...................................................................................................... 121 9.1.2 Analog Power and Ground Signal Names ...................................................................... 122 9.1.3 Alternate Clock ............................................................................................................... 122 9.1.4 Hardware Trigger ............................................................................................................ 122 9.1.5 Temperature Sensor ........................................................................................................ 122 9.1.6 Features ........................................................................................................................... 125 9.1.7 ADC Module Block Diagram ......................................................................................... 125 9.2 External Signal Description .......................................................................................................... 126 9.2.1 Analog Power (VDDA) .................................................................................................... 127 9.2.2 Analog Ground (VSSA) ................................................................................................... 127 9.2.3 Voltage Reference High (VREFH) ................................................................................... 127 9.2.4 Voltage Reference Low (VREFL)..................................................................................... 127 9.2.5 Analog Channel Inputs (ADx) ........................................................................................ 127 9.3 Register Definition ........................................................................................................................ 127 9.3.1 Status and Control Register 1 (ADCSC1) ...................................................................... 128 9.3.2 Status and Control Register 2 (ADCSC2) ...................................................................... 129 9.3.3 Data Result High Register (ADCRH)............................................................................. 130 9.3.4 Data Result Low Register (ADCRL) .............................................................................. 130 9.3.5 Compare Value High Register (ADCCVH) .................................................................... 131 9.3.6 Compare Value Low Register (ADCCVL) ..................................................................... 131 9.3.7 Configuration Register (ADCCFG) ................................................................................ 131 9.3.8 Pin Control 1 Register (APCTL1) .................................................................................. 133 9.3.9 Pin Control 2 Register (APCTL2) .................................................................................. 134 9.3.10 Pin Control 3 Register (APCTL3) .................................................................................. 135 9.4 Functional Description .................................................................................................................. 136 9.4.1 Clock Select and Divide Control .................................................................................... 136 9.4.2 Input Select and Pin Control ........................................................................................... 137 9.4.3 Hardware Trigger ............................................................................................................ 137 9.4.4 Conversion Control ......................................................................................................... 137 9.4.5 Automatic Compare Function......................................................................................... 140 9.4.6 MCU Wait Mode Operation............................................................................................ 141 9.4.7 MCU Stop3 Mode Operation.......................................................................................... 141 9.4.8 MCU Stop2 Mode Operation.......................................................................................... 142 9.5 Initialization Information .............................................................................................................. 142 |
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