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MC33596 Datasheet(PDF) 24 Page - Freescale Semiconductor, Inc

Part # MC33596
Description  PLL Tuned UHF Receiver for Data Transfer Applications
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MC33596 Datasheet(HTML) 24 Page - Freescale Semiconductor, Inc

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MC33596 Data Sheet, Rev. 4
Receive Mode
Freescale Semiconductor
24
11.4.2 Operation
Two modes of operation are available: sample mode and continuous mode.
11.4.2.1 Sample Mode
Sample mode allows the peak power of a specific pulse in an incoming frame to be measured.
The quasi peak detector is reset by closing S1. After 7
× Tdigclk, S1 is released. S2 is closed when RSSIC
is set high. On the falling edge of RSSIC, S2 is opened. The voltage on RSSIOUT is sampled and held.
The last RSSI conversion results are stored in the RSSI register and no further conversion is done.
The RSSI register is updated every 32
× Tdigclk. Therefore, the minimum duration of the high pulse on
RSSIC is 32
× Tdigclk.
Figure 16. RSSI Operation in Sample Mode
11.4.2.2 Continuous Mode
Continuous mode is used to make a peak measurement on an incoming frame, without having to select a
specific pulse to be measured.
The quasi peak detector is reset by closing S1. After 7
× Tdigclk, S1 is opened. S2 is closed when RSSIC
is set high. As long as RSSIC is kept high, S2 is closed, and RSSIOUT follows the peak value with a decay
time constant of 5 ms.
The ADC runs continuously, and continually updates the RSSI register. Thus, reading this register gives
the most recent conversion value, prior to the register being read. The minimum duration of the high pulse
on CONFB is 32
× Tdigclk.
Closed
7 x tdigclk
Updated
Frozen
Sampled and Hold RSSI Voltage
Peak Detector
Reset
Sampling
Open
Open
Frozen
Open
Closed
Closed
RSSIC
S1
S2
RSSI Register
RSSIOUT
CONFB
MOSI
MISO
CMD
RSSI Value


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