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MPC5604BEMLLR Datasheet(PDF) 7 Page - Freescale Semiconductor, Inc |
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MPC5604BEMLLR Datasheet(HTML) 7 Page - Freescale Semiconductor, Inc |
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7 / 72 page  Device blocks MPC5604B/C Microcontroller Data Sheet, Rev. 4 Freescale Semiconductor 7 Periodic interrupt timer (PIT) Produces periodic interrupts and triggers Power control unit (PCU) Reduces the overall power consumption by disconnecting parts of the device from the power supply via a power switching device; device components are grouped into sections called “power domains” which are controlled by the PCU Real-time counter (RTC) A free running counter used for time keeping applications, the RTC can be configured to generate an interrupt at a predefined interval independent of the mode of operation (run mode or low-power mode) Reset generation module (RGM) Centralizes reset sources and manages the device reset sequence of the device Static random-access memory (SRAM) Provides storage for program code, constants, and variables System integration unit (SIU) Provides control over all the electrical pad controls and up 32 ports with 16 bits of bidirectional, general-purpose input and output signals and supports up to 32 external interrupts with trigger event configuration System status configuration module (SSCM) Provides system configuration and status data (such as memory size and status, device mode and security status), device identification data, debug status port enable and selection, and bus and peripheral abort enable/disable System timer module (STM) Provides a set of output compare events to support AUTOSAR and operating system tasks System watchdog timer (SWT) Provides protection from runaway code Test control unit (TCU) An extension of the JTAG controller module, the TCU provides the means to test chip functionality and connectivity while remaining transparent to system logic when not in test mode. Table 2. MPC5604B/C series block summary (continued) Block Function |
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