Electronic Components Datasheet Search
  English  ▼

Delete All
ON OFF
ALLDATASHEET.COM

X  

Preview PDF Download HTML

TDA8922C Datasheet(PDF) 15 Page - NXP Semiconductors

Part No. TDA8922C
Description  2 X 75 W class-D power amplifier
Download  40 Pages
Scroll/Zoom Zoom In 100% Zoom Out
Maker  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo 

TDA8922C Datasheet(HTML) 15 Page - NXP Semiconductors

Zoom Inzoom in Zoom Outzoom out
 15 / 40 page
background image
TDA8922C_1
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 01 — 7 September 2009
15 of 40
NXP Semiconductors
TDA8922C
2
× 75 W class-D power amplifier
[1]
When using an external oscillator, the frequency ftrack (500 kHz minimum, 900 kHz maximum) will result in a PWM frequency fosc (250
kHz minimum, 450 kHz maximum) due to the internal clock divider; see Section 8.2.
[2]
When tr(i) > 100 ns, the output noise floor will increase.
12.2 Stereo SE configuration characteristics
Zi
input impedance
1
-
-
M
Ci
input capacitance
-
-
15
pF
tr(i)
input rise time
from SGCN to SGND + 5 V
[2]
-
-
100
ns
Table 9.
Dynamic characteristics …continued
VDD =30V; VSS = −30 V; Tamb = 25 °C; unless otherwise specified.
Symbol Parameter
Conditions
Min
Typ
Max
Unit
Table 10.
Dynamic characteristics
VDD =30V; VSS = −30 V; RL = 6 Ω; fi = 1 kHz; fosc = 350 kHz; Rs(L) < 0.1 Ω[1]; Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Po
output power
L = 22
µH; CLC = 680 nF; Tj =85 °C
[2]
THD = 0.5 %; RL = 6 Ω
-58
-
W
THD = 10 %; RL = 6 Ω
-75
-
W
THD
total harmonic distortion
Po = 1 W; fi = 1 kHz
[3] -
0.02 -
%
Po = 1 W; fi = 6 kHz
[3] -
0.05 -
%
Gv(cl)
closed-loop voltage gain
29
30
31
dB
SVRR
supply voltage rejection ratio
between pins VDDPn and SGND
Operating mode; fi = 100 Hz
[4] -72
-
dB
Operating mode; fi = 1 kHz
[4] -55
-
dB
Mute mode; fi = 100 Hz
[4] -80
-
dB
Standby mode; fi = 100 Hz
[4] -
116
-
dB
between pins VSSPn and SGND
Operating mode; fi = 100 Hz
[4] -72
-
dB
Operating mode; fi = 1 kHz
[4] -60
-
dB
Mute mode; fi = 100 Hz
[4] -72
-
dB
Standby mode; fi = 100 Hz
[4] -
116
-
dB
Zi
input impedance
between one of the input pins and
SGND
45
63
-
k
Vn(o)
output noise voltage
Operating mode; Rs =0 Ω; inputs
shorted
[5] -
160
-
µV
Mute mode
[6] -85
-
µV
αcs
channel separation
[7] -70
-
dB
|∆Gv|
voltage gain difference
-
-
1
dB
αmute
mute attenuation
fi = 1 kHz; Vi = 2 V (RMS)
[8] -75
-
dB
CMRR
common mode rejection ratio
Vi(CM) = 1 V (RMS)
-
75
-
dB
ηpo
output power efficiency
SE, RL = 6 Ω
-88
-
%
SE, RL = 8 Ω
-90
-
%
BTL, RL = 16 Ω
-90
-
%
RDSon(hs)
high-side drain-source on-state resistance
[9] -
380
-
m
RDSon(ls)
low-side drain-source on-state resistance
[9] -
320
-
m


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40 


Datasheet Download




Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ]  

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Alldatasheet API   |   Link Exchange   |   Manufacturer List
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn