HB52F168GB-B datasheet(16/19 Pages) ELPIDA

Part #	HB52F168GB-B

Description	128 MB Unbuffered SDRAM Micro DIMM 16-Mword 횞 64-bit, 133/100 MHz Memory Bus, 1-Bank Module (4 pcs of 16 M 횞 16 components) PC133/100 SDRAM

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Manufacturer	ELPIDA [Elpida Memory]

Direct Link	http://www.elpida.com/en

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16 / 19 page

HB52F168GB-B, HB52D168GB-B

Data Sheet E0008H10

16

Relationship Between Frequency and Minimum Latency

HB52F168GB-B/HB52D168GB-B

Parameter

133

100

Frequency (MHz)

CE latency = 3 CE latency = 2

t

CK (ns)

Symbol

PC100

Symbol 7.5

10

Notes

Active command to column command

(same bank)

I

RCD

321

Active command to active command

(same bank)

I

RC

97= [I

RAS + IRP]

1

Active command to precharge command

(same bank)

I

RAS

651

Precharge command to active command

(same bank)

I

RP

321

Write recovery or data-in to precharge

command (same bank)

I

DPL

Tdpl

2

1

Active command to active command

(different bank)

I

RRD

221

Self refresh exit time

I

SREX

Tsrx

1

2

Last data in to active command

(Auto precharge, same bank)

I

APW

Tdal

5

4

= [I

DPL + IRP]

Self refresh exit to command input

I

SEC

97= [I

RC]

3

Precharge command to high impedance

I

HZP

Troh

3

2

Last data out to active command

(auto precharge) (same bank)

I

APR

11

Last data out to precharge

(early precharge)

I

EP

–2

–1

Column command to column command

I

CCD

Tccd

1

Write command to data in latency

I

WCD

Tdwd

0

DQMB to data in

I

DID

Tdqm

0

DQMB to data out

I

DOD

Tdqz

2

CKE to CK disable

I

CLE

Tcke

1

Register set to active command

I

RSA

Tmrd

1

S to command disable

I

CDD

00

Power down exit to command input

I

PEC

11

Notes: 1. I

RCD to IRRD are recommended value.

2. Be valid [DSEL] or [NOP] at next command of self refresh exit.

3. Except [DSEL] and [NOP]

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HB52F168GB-B Datasheet(PDF) 16 Page - Elpida Memory

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