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M2S56D40AKT Datasheet(PDF) 6 Page - Elpida Memory |
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M2S56D40AKT Datasheet(HTML) 6 Page - Elpida Memory |
6 / 41 page 6 DDR SDRAM E0338M10 (Ver.1.0) (Previous Rev.1.54E) Jan. '03 CP(K) M2S56D20/ 30/ 40ATP 256M Double Data Rate Synchronous DRAM M2S56D20/ 30/ 40AKT TYPE DESIGNATION CODE This rule is applied to only Synchronous DRAM family. Mitsubishi Main Designation Speed Grade 60: 166MHz@CL=2.5,133MHz@CL=2.0 75: 133MHz@CL=2.5,100MHz@CL=2.0 Package Type TP: TSOP(II), KT: sTSOP(Small TSOP) Process Generation Function Reserved for Future Use Organization 2 n 2: x4, 3: x8, 4: x16 DDR Synchronous DRAM Density 56: 256M bits Interface V:LVTTL, S:SSTL_3, _2 Memory Style (DRAM) M 2 S 56 D 3 0 A KT – 60 UL BLOCK DIAGRAM /CS /RAS /CAS /WE UDM, LDM Memory Array Bank #0 DQ0 - 15 I/O Buffer Memory Array Bank #1 Memory Array Bank #2 Memory Array Bank #3 Mode Register Control Circuitry Address Buffer A0-12 BA0,1 Clock Buffer CLK CKE Control Signal Buffer QS Buffer UDQS,LDQS DLL 75A: 133MHz@CL=2.5,133MHz@CL=2.0 /CLK (DDR333B) (DDR266B) (DDR266A) Power Grade UL/U: Ultra Low power L: Low power, Blank: standard |
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