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ECS1232ABCN-A Datasheet(PDF) 28 Page - Elpida Memory

Part # ECS1232ABCN-A
Description  128M bits SDRAM Bare Chip
Download  46 Pages
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Manufacturer  ELPIDA [Elpida Memory]
Direct Link  http://www.elpida.com/en
Logo ELPIDA - Elpida Memory

ECS1232ABCN-A Datasheet(HTML) 28 Page - Elpida Memory

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ECS1232ABCN-A
Data Sheet E0486E30 (Ver. 3.0)
28
Command Intervals
Read command to Read command interval
1. Same bank, same ROW address: When another read command is executed at the same ROW address of the
same bank as the preceding read command execution, the second read can be performed after an interval of no
less than 1 clock. Even when the first command is a burst read that is not yet finished, the data read by the
second command will be valid.
CLK
Command
DQ
out B3
Address
out B1 out B2
BS
ACT
Row
Column A
READ
READ
Column B
out A0 out B0
Bank0
Active
Column =A
Read
Column =B
Read
Column =A
Dout
Column =B
Dout
CL = 3
BL = 4
Bank 0
READ to READ Command Interval (same ROW address in same bank)
2. Same bank, different ROW address: When the ROW address changes on same bank, consecutive read
commands cannot be executed; it is necessary to separate the two read commands with a precharge command
and a bank active command.
3. Different bank: When the bank changes, the second read can be performed after an interval of no less than 1
clock, provided that the other bank is in the bank active state. Even when the first command is a burst read that
is not yet finished, the data read by the second command will be valid.
CLK
Command
DQ
out B3
Address
out B1 out B2
BS
ACT
Row 0
Row 1
ACT
READ
Column A
out A0 out B0
Bank0
Active
Bank3
Active
Bank0
Read
Bank3
Read
READ
Column B
Bank0
Dout
Bank3
Dout
CL = 3
BL = 4
READ to READ Command Interval (different bank)


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