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EDE1116ACSE-6ELI-E Datasheet(PDF) 56 Page - Elpida Memory |
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EDE1116ACSE-6ELI-E Datasheet(HTML) 56 Page - Elpida Memory |
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56 / 75 page  EDE1116ACSE-LI Data Sheet E1103E20 (Ver. 2.0) 56 Precharge Command [PRE] The precharge command is used to precharge or close a bank that has been activated. The precharge command is triggered when /CS, /RAS and /WE are low and /CAS is high at the rising edge of the clock. The precharge command can be used to precharge each bank independently or all banks simultaneously. Three address bits A10, BA0, BA1 and BA2 are used to define which bank to precharge when the command is issued. [Bank Selection for Precharge by Address Bits] A10 BA0 BA1 BA2 Precharged Bank(s) L L L L Bank 0 only L H L L Bank 1 only L L H L Bank 2 only L H H L Bank 3 only L L L H Bank 4 only L H L H Bank 5 only L L H H Bank 6 only L H H H Bank 7 only H × × × All banks 0 to 7 Remark: H: VIH, L: VIL, ×: VIH or VIL Burst Read Operation Followed by Precharge Minimum read to precharge command spacing to the same bank = AL + BL/2 clocks For the earliest possible precharge, the precharge command may be issued on the rising edge that is “Additive latency (AL) + BL/2 clocks” after a Read command. A new bank active (command) may be issued to the same bank after the RAS precharge time (tRP). A precharge command cannot be issued until tRAS is satisfied. NOP CK /CK T0 T1 T2 T3 T4 T5 T6 T7 T8 Command DQS, /DQS DQ RL = 4 AL = 1 CL = 3 out0 out2 PRE NOP out1 out3 Posted READ NOP ≥tRP ≥tRAS ACT AL + BL/2 clocks Burst Read Operation Followed by Precharge (RL = 4, BL = 4 (AL=1, CL=3)) |
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