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MCP616 Datasheet(PDF) 15 Page - Microchip Technology

Part No. MCP616
Description  2.3V to 5.5V Micropower Bi-CMOS Op Amps
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Maker  MICROCHIP [Microchip Technology]
Homepage  http://www.microchip.com
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MCP616 Datasheet(HTML) 15 Page - Microchip Technology

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© 2008 Microchip Technology Inc.
DS21613C-page 15
MCP616/7/8/9
4.0
APPLICATIONS INFORMATION
The MCP616/7/8/9 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process,
which includes PNP transistors. These op amps are
unity-gain stable and suitable for a wide range of
general purpose applications.
4.1
Rail-to-Rail Inputs
4.1.1
PHASE REVERSAL
The MCP616/7/8/9 op amp is designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 2-36 shows the input voltage exceed-
ing the supply voltage without any phase reversal.
4.1.2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors, and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltages that go too far
above VDD; their breakdown voltage is high enough to
allow normal operation, and low enough to bypass
quick ESD events within the specified limits.
FIGURE 4-1:
Simplified Analog Input ESD
Structures.
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
currents and voltages at the VIN+ and VIN– pins (see
“Absolute Maximum Ratings †”
at the beginning of
Section 1.0 “Electrical Characteristics”
). Figure 4-2
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN–) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN–) from going too far above
VDD, and dump any currents onto VDD. When
implemented as shown, resistors R1 and R2 also limit
the current through D1 and D2.
FIGURE 4-2:
Protecting the Analog
Inputs.
It is also possible to connect the diodes to the left of
resistors R1 and R2. In this case, current through the
diodes D1 and D2 needs to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC current into the input pins (VIN+ and
VIN–) should be very small.
A significant amount of current can flow out of the
inputs when the common mode voltage (VCM) is below
ground (VSS). (See Figure 2-36.) Applications that are
high impedance may need to limit the usable voltage
range.
4.1.3
NORMAL OPERATION
The inputs of the MCP616/7/8/9 op amps connect to a
differential PNP input stage. The common mode input
voltage range (VCMR) includes ground in single-supply
systems (VSS), but does not include VDD. This means
that the amplifier input behaves linearly as long as the
common mode input voltage (VCM) is kept within the
specified VCMR limits (VSS to VDD–0.9V at +25°C).
4.2
DC Offsets
The MCP616/7/8/9 family of op amps have a PNP input
differential pair that gives good DC performance. They
have very low input offset voltage (±150 µV, maximum)
at TA = +25°C, with a typical bias current of -15 nA
(sourced out of the inputs).
There must be a DC path to ground (or power supply)
from both inputs, or the op amp will not bias properly.
The DC resistances seen by the op amp inputs (R1||R2
and R4||R5 in Figure 4-3) need to be equal and less
than 100 kΩ, to minimize the total DC offset.
Bond
Pad
Bond
Pad
Bond
Pad
VDD
VIN+
VSS
Input
Stage
Bond
Pad
VIN
V1
MCP61X
R1
VDD
D1
R1 >
VSS – (minimum expected V1)
2mA
R2 >
VSS – (minimum expected V2)
2mA
V2
R2
D2
R3


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