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MCP3008T Datasheet(PDF) 4 Page - Microchip Technology

Part No. MCP3008T
Description  2.7V 4-Channel/8-Channel 10-Bit A/D Converters with SPI Serial Interface
Download  40 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MCP3008T Datasheet(HTML) 4 Page - Microchip Technology

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MCP3004/3008
DS21295D-page 4
© 2008 Microchip Technology Inc.
Leakage Current
0.001
±1
µA
Switch Resistance
1000
Ω
See Figure 4-1
Sample Capacitor
20
pF
See Figure 4-1
Digital Input/Output
Data Coding Format
Straight Binary
High Level Input Voltage
VIH
0.7 VDD
——
V
Low Level Input Voltage
VIL
0.3 VDD
V
High Level Output Voltage
VOH
4.1
V
IOH = -1 mA, VDD = 4.5V
Low Level Output Voltage
VOL
——
0.4
V
IOL = 1 mA, VDD = 4.5V
Input Leakage Current
ILI
-10
10
µA
VIN = VSS or VDD
Output Leakage Current
ILO
-10
10
µA
VOUT = VSS or VDD
Pin Capacitance
(All Inputs/Outputs)
CIN,
COUT
——
10
pF
VDD = 5.0V (Note 1)
TA = 25°C, f = 1 MHz
Timing Parameters
Clock Frequency
fCLK
——
3.6
1.35
MHz
MHz
VDD = 5V (Note 3)
VDD = 2.7V (Note 3)
Clock High Time
tHI
125
ns
Clock Low Time
tLO
125
ns
CS Fall To First Rising CLK Edge
tSUCS
100
ns
CS Fall To Falling CLK Edge
tCSD
——
0
ns
Data Input Setup Time
tSU
50
ns
Data Input Hold Time
tHD
50
ns
CLK Fall To Output Data Valid
tDO
——
125
200
ns
ns
VDD = 5V, See Figure 1-2
VDD = 2.7V, See Figure 1-2
CLK Fall To Output Enable
tEN
——
125
200
ns
ns
VDD = 5V, See Figure 1-2
VDD = 2.7V, See Figure 1-2
CS Rise To Output Disable
tDIS
100
ns
See Test Circuits, Figure 1-2
CS Disable Time
tCSH
270
ns
D
OUT Rise Time
tR
100
ns
See Test Circuits, Figure 1-2
(Note 1)
D
OUT Fall Time
tF
100
ns
See Test Circuits, Figure 1-2
(Note 1)
ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics:
Unless otherwise noted, all parameters apply at VDD = 5V, VREF = 5V,
TA = -40°C to +85°C, fSAMPLE = 200 ksps and fCLK = 18*fSAMPLE. Unless otherwise noted, typical values apply for
VDD = 5V, TA = +25°C.
Parameter
Sym
Min
Typ
Max
Units
Conditions
Note 1:
This parameter is established by characterization and not 100% tested.
2:
See graphs that relate linearity performance to VREF levels.
3:
Because the sample cap will eventually lose charge, effective clock rates below 10 kHz can affect linearity
performance, especially at elevated temperatures. See Section 6.2 “Maintaining Minimum Clock
Speed”
, “Maintaining Minimum Clock Speed”, for more information.


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