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MCP3008T Datasheet(PDF) 21 Page - Microchip Technology |
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MCP3008T Datasheet(HTML) 21 Page - Microchip Technology |
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21 / 40 page  © 2008 Microchip Technology Inc. DS21295D-page 21 MCP3004/3008 6.0 APPLICATIONS INFORMATION 6.1 Using the MCP3004/3008 with Microcontroller (MCU) SPI Ports With most microcontroller SPI ports, it is required to send groups of eight bits. It is also required that the microcontroller SPI port be configured to clock out data on the falling edge of clock and latch data in on the rising edge. Because communication with the MCP3004/3008 devices may not need multiples of eight clocks, it will be necessary to provide more clocks than are required. This is usually done by sending ‘leading zeros’ before the start bit. As an example, Figure 6-1 and Figure 6-2 shows how the MCP3004/ 3008 can be interfaced to a MCU with a hardware SPI port. Figure 6-1 depicts the operation shown in SPI Mode 0,0, which requires that the SCLK from the MCU idles in the ‘low’ state, while Figure 6-2 shows the sim- ilar case of SPI Mode 1,1, where the clock idles in the ‘high’ state. As is shown in Figure 6-1, the first byte transmitted to the A/D converter contains seven leading zeros before the start bit. Arranging the leading zeros this way induces the 10 data bits to fall in positions easily manipulated by the MCU. The MSB is clocked out of the A/D converter on the falling edge of clock number 14. Once the second eight clocks have been sent to the device, the MCU receive buffer will contain five unknown bits (the output is at high-impedance for the first two clocks), the null bit and the highest order 2 bits of the conversion. Once the third byte has been sent to the device, the receive register will contain the lowest order eight bits of the conversion results. Employing this method ensures simpler manipulation of the converted data. Figure 6-2 shows the same thing in SPI Mode 1,1, which requires that the clock idles in the high state. As with mode 0,0, the A/D converter outputs data on the falling edge of the clock and the MCU latches data from the A/D converter in on the rising edge of the clock. FIGURE 6-1: SPI Communication with the MCP3004/3008 using 8-bit segments (Mode 0,0: SCLK idles low). 12 3 4 5 6 7 8 9 10 11 12 13 14 15 16 CS SCLK DIN X = “Don’t Care” Bits 17 18 19 20 21 22 23 24 DOUT NULL BIT B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 HI-Z MCU latches data from A/D Data is clocked out of A/D converter on falling edges converter on rising edges of SCLK Don’t Care SGL/ DIFF D1 D2 Start 00 0 0 0 1 XX X X DO X X XX X X XX B7 B6 B5 B4 B3 B2 B1 B0 B9 B8 0 ?? ? ? ? ? ? ?? ? D1 D2 SGL/ DIFF Start Bit (Null) MCU Transmitted Data (Aligned with falling edge of clock) Data stored into MCU receive register after transmission of first 8 bits Data stored into MCU receive register after transmission of second 8 bits Data stored into MCU receive register after transmission of last 8 bits DO ? ? 00 ? MCU Received Data (Aligned with rising edge of clock) |
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