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STM32F103ZEY7TR Datasheet(PDF) 41 Page - STMicroelectronics |
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STM32F103ZEY7TR Datasheet(HTML) 41 Page - STMicroelectronics |
41 / 123 page STM32F103xC, STM32F103xD, STM32F103xE Electrical characteristics Doc ID 14611 Rev 7 41/123 5.2 Absolute maximum ratings Stresses above the absolute maximum ratings listed in Table 7: Voltage characteristics, Table 8: Current characteristics, and Table 9: Thermal characteristics may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these conditions is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Table 7. Voltage characteristics Symbol Ratings Min Max Unit VDD–VSS External main supply voltage (including VDDA and VDD) (1) 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. –0.3 4.0 V VIN Input voltage on five volt tolerant pin(2) 2. IINJ(PIN) must never be exceeded (see Table 8: Current characteristics). This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN > VINmax while a negative injection is induced by VIN < VSS. VSS 0.3 +5.5 Input voltage on any other pin(2) VSS 0.3 VDD+0.3 | V DDx| Variations between different VDD power pins 50 mV |VSSX VSS| Variations between all the different ground pins 50 VESD(HBM) Electrostatic discharge voltage (human body model) see Section 5.3.12: Absolute maximum ratings (electrical sensitivity) Table 8. Current characteristics Symbol Ratings Max. Unit IVDD Total current into VDD/VDDA power lines (source) (1) 1. All main power (VDD, VDDA) and ground (VSS, VSSA) pins must always be connected to the external power supply, in the permitted range. 150 mA IVSS Total current out of VSS ground lines (sink) (1) 150 IIO Output current sunk by any I/O and control pin 25 Output current source by any I/Os and control pin 25 IINJ(PIN) (2)(3) 2. IINJ(PIN) must never be exceeded. This is implicitly insured if VIN maximum is respected. If VIN maximum cannot be respected, the injection current must be limited externally to the IINJ(PIN) value. A positive injection is induced by VIN > VDD while a negative injection is induced by VIN < VSS. 3. Negative injection disturbs the analog performance of the device. See note in Section 5.3.18: 12-bit ADC characteristics. Injected current on NRST pin ± 5 Injected current on HSE OSC_IN and LSE OSC_IN pins ± 5 Injected current on any other pin(4) 4. When several inputs are submitted to a current injection, the maximum I INJ(PIN) is the absolute sum of the positive and negative injected currents (instantaneous values). These results are based on characterization with I INJ(PIN) maximum current injection on four I/O port pins of the device. ± 5 I INJ(PIN) (2) Total injected current (sum of all I/O and control pins)(4) ± 25 |
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