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STM8L101G2P3ATR Datasheet(PDF) 5 Page - STMicroelectronics

Part # STM8L101G2P3ATR
Description  8-bit ultralow power microcontroller with up to 8 Kbytes Flash, multifunction timers, comparators, USART, SPI, I2C
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
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STM8L101G2P3ATR Datasheet(HTML) 5 Page - STMicroelectronics

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STM8L101xx
List of figures
Doc ID 15275 Rev 7
5/77
List of figures
Figure 1.
STM8L101 device block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 2.
Standard 20-pin UFQFPN package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Figure 3.
20-pin UFQFPN package pinout for STM8L101F3U6ATR and
STM8L101F2U6ATR part numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Figure 4.
20-pin TSSOP package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5.
Standard 28-pin WFQFPN package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Figure 6.
28-pin WFQFPN package pinout for STM8L101G3U6ATR and
STM8L101G2U6ATR part numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7.
32-pin package pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 8.
Memory map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9.
Pin loading conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Figure 10.
Pin input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 11.
IDD(RUN) vs. VDD@ fCPU = 2 MHz
@4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 12.
IDD(RUN) vs. VDD@ fCPU = 16 MHz @4 temperatures. . . . . . . . . . . . . . . . . . . . . . . . . . 41
Figure 13.
IDD(WAIT) vs. VDD@ fCPU = 2 MHz
@4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 14.
IDD(WAIT) vs. VDD@ fCPU = 16 MHz @4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . 42
Figure 15.
Typ. IDD(Halt) vs. VDD @ fCPU = 2 MHz and 16 MHz @4 temperatures. . . . . . . . . . . . . 43
Figure 16.
Typical HSI frequency vs VDD @ 4 temperatures. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Figure 17.
Typical HSI accuracy at VDD = 3 V vs temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Figure 18.
Typical HSI accuracy at VDD = 1.65 V to 3.6 V vs temperature. . . . . . . . . . . . . . . . . . . . . 46
Figure 19.
Typical LSI RC frequency vs. VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Figure 20.
Typical VIL and VIH vs VDD (standard I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 21.
Typical VIL and VIH vs VDD (true open drain I/Os) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Figure 22.
Typical pull-up resistance RPU vs VDD @ 4 temperatures with VIN=VSS . . . . . . . . . . . . . 50
Figure 23.
Typical pull-up current Ipu vs VDD @ 4 temperatures with VIN=VSS . . . . . . . . . . . . . . . . . 51
Figure 24.
Typ. VOL @ VDD = 3.0 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 25.
Typ. VOL @ VDD = 1.8 V (standard ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 26.
Typ. VOL @ VDD = 3.0 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 27.
Typ. VOL @ VDD = 1.8 V (true open drain ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 28.
Typ. VDD - VOH @ VDD = 3.0 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 29.
Typ. VDD - VOH @ VDD = 1.8 V (standard ports) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Figure 30.
Typical NRST pull-up resistance RPU vs VDD @ 4 temperatures. . . . . . . . . . . . . . . . . . . . 54
Figure 31.
Typical NRST pull-up current Ipu vs VDD @ 4 temperatures . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 32.
Recommended NRST pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Figure 33.
SPI timing diagram - slave mode and CPHA = 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 34.
SPI timing diagram - slave mode and CPHA = 1(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Figure 35.
SPI timing diagram - master mode(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 36.
Typical application with I2C bus and timing diagram 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Figure 37.
WFQFPN32 - 32-lead very very thin fine pitch quad flat no-lead package outline (5 x 5) . 65
Figure 38.
WFQFPN32 recommended footprint(1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Figure 39.
LQFP32 - 32-pin low profile quad flat package outline (7 x 7) . . . . . . . . . . . . . . . . . . . . . . 67
Figure 40.
LQFP32 recommended footprint(1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Figure 41.
WFQFPN28 - 28-lead very very thin fine pitch quad flat no-lead package outline (4 x 4) . 68
Figure 42.
WFQFPN28 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Figure 43.
UFQFPN20 3 x 3 mm 0.6 mm package outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Figure 44.
UFQFPN20 recommended footprint (1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69


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