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SG6742MRSY Datasheet(PDF) 10 Page - Fairchild Semiconductor |
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SG6742MRSY Datasheet(HTML) 10 Page - Fairchild Semiconductor |
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10 / 13 page  © 2008 Fairchild Semiconductor Corporation www.fairchildsemi.com SG6742ML/MR • Rev. 1.0.4 10 Functional Description (Continued) Limited Power Control The FB voltage increases every time the output of the power supply is shorted or overloaded. If the FB voltage remains higher than a built-in threshold for longer than tD-OLP, PWM output is turned off. As PWM output is turned off, VDD begins decreasing. When VDD goes below the turn-off threshold (~9.5V) the controller is totally shut down. VDD is charged up to the turn-on threshold voltage of 15.5V through the startup resistor until PWM output is restarted. This protection feature continues as long as the overloading condition persists. This prevents the power supply from overheating due to overloading conditions. When VRT is less than 1.05V (VRTTH1), the PWM is turned off after 12ms (tD-OTP1). If VRT is less than 0.7V (VRTTH2), PWM is turned off after 100µs (tD-OTP2). Noise Immunity Noise on the current sense or control signal may cause significant pulse-width jitter, particularly in continuous- conduction mode. Slope compensation helps alleviate this problem. Good placement and layout practices should be followed. Avoiding long PCB traces and component leads, locating compensation and filter components near the SG6742ML/MR, and increasing the power MOS gate resistance improve performance. |
Similar Part No. - SG6742MRSY |
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Similar Description - SG6742MRSY |
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