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FDP19N40 Datasheet(PDF) 1 Page - Fairchild Semiconductor |
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FDP19N40 Datasheet(HTML) 1 Page - Fairchild Semiconductor |
1 / 9 page tm October ©2008 Fairchild Semiconductor Corporation FDP19N40 / FDPF19N40 Rev. A www.fairchildsemi.com 1 UniFET TM FDP19N40 / FDPF19N40 N-Channel MOSFET 400V, 19A, 0.24 Ω Features •RDS(on) =0.2Ω ( Typ.)@ VGS = 10V, ID = 9.5A • Low Gate Charge ( Typ. 32nC) • Low Crss ( Typ. 20pF) • Fast Switching • 100% Avalanche Tested • Improved dv/dt Capability • RoHS Compliant Description These N-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pluse in the avalanche and commutation mode. These devices are well suited for high efficient switched mode power suppliesand active power factor correction. D G S TO-220F FDPF Series G S D TO-220 FDP Series G S D MOSFET Maximum Ratings T C = 25 oC unless otherwise noted* Thermal Characteristics Symbol Parameter FDP19N40 FDPF19N40 Units VDSS Drain to Source Voltage 400 V VGSS Gate to Source Voltage ±30 V ID Drain Current -Continuous (TC = 25 oC) 19 19* A -Continuous (TC = 100 oC) 11.4 11.4* IDM Drain Current - Pulsed (Note 1) 76 76* A EAS Single Pulsed Avalanche Energy (Note 2) 542 mJ IAR Avalanche Current (Note 1) 19 A EAR Repetitive Avalanche Energy (Note 1) 21.5 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) 15 V/ns PD Power Dissipation (TC = 25 oC) 215 40 W - Derate above 25oC 1.65 0.3 W/oC TJ, TSTG Operating and Storage Temperature Range -55 to +150 oC TL Maximum Lead Temperature for Soldering Purpose, 1/8” from Case for 5 Seconds 300 oC Symbol Parameter FDP19N40 FDPF19N40 Units RθJC Thermal Resistance, Junction to Case 0.6 3.0 oC/W RθCS Thermal Resistance, Case to Sink Typ. 0.5 - RθJA Thermal Resistance, Junction to Ambient 62.5 62.5 *Drain current limited by maximum junction temperature |
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