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XR68M752IL32 Datasheet(PDF) 5 Page - Exar Corporation

Part # XR68M752IL32
Description  HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
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Manufacturer  EXAR [Exar Corporation]
Direct Link  http://www.exar.com
Logo EXAR - Exar Corporation

XR68M752IL32 Datasheet(HTML) 5 Page - Exar Corporation

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XR16M752/XR68M752
5
REV. 1.1.1
HIGH PERFORMANCE DUART WITH 64-BYTE FIFO
INTA
(IRQ#)
22
30
D6
O
When 16/68# pin is HIGH for Intel bus interface, this out-
put becomes channel A interrupt output. The output state
is defined by the user through the software setting of
MCR[3]. INTA is set to the active mode and OP2A# out-
put LOW when MCR[3] is set to a logic 1. INTA is set to
the three state mode and OP2A# to HIGH when MCR[3]
is set to a logic 0. See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this
output becomes device interrupt output (active low, open
drain). An external pull-up resistor is required for proper
operation.
INTB
(NC)
21
29
D7
O
When 16/68# pin is HIGH for Intel bus interface, this out-
put becomes channel B interrupt output. The output state
is defined by the user through the software setting of
MCR[3]. INTB is set to the active mode and OP2A# out-
put to LOW when MCR[3] is set to a logic 1. INTA is set to
the three state mode and OP2A# to HIGH when MCR[3]
is set to a logic 0. See MCR[3].
When 16/68# pin is LOW for Motorola bus interface, this
output is not used.
TXRDYA#
-
43
C4
O
UART channel A Transmitter Ready (active low). The
output provides the TX FIFO/THR status for transmit
channel A. See
Table 3. If it is not used, leave it uncon-
nected.
RXRDYA#
-
31
E5
O
UART channel A Receiver Ready (active low). This out-
put provides the RX FIFO/RHR status for receive channel
A. See
Table 3. If it is not used, leave it unconnected.
TXRDYB#
-
6
D4
O
UART channel B Transmitter Ready (active low). The
output provides the TX FIFO/THR status for transmit
channel B. See
Table 4. If it is not used, leave it uncon-
nected.
RXRDYB#
-
18
F4
O
UART channel B Receiver Ready (active low). This out-
put provides the RX FIFO/RHR status for receive channel
B. See
Table 3. If it is not used, leave it unconnected.
MODEM OR SERIAL I/O INTERFACE
TXA
5
7
D3
O
UART channel A Transmit Data or infrared encoder data.
Standard transmit and receive interface is enabled when
MCR[6] = 0. In this mode, the TX signal will be HIGH dur-
ing reset or idle (no data). Infrared IrDA transmit and
receive interface is enabled when MCR[6] = 1. In the
Infrared mode, the inactive state (no data) for the Infrared
encoder/decoder interface is LOW. If it is not used, leave
it unconnected.
Pin Description
NAME
32-QFN
PIN #
48-TQFP
PIN #
49-STBGA
PIN #
TYPE
DESCRIPTION


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