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XR16M770IB25 Datasheet(PDF) 6 Page - Exar Corporation |
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XR16M770IB25 Datasheet(HTML) 6 Page - Exar Corporation |
6 / 52 page XR16M770 6 1.62V TO 3.63V HIGH PERFORMANCE UART WITH 64-BYTE FIFO REV. 1.0.0 2.0 FUNCTIONAL DESCRIPTIONS 2.1 CPU Interface The CPU interface is 8 data bits wide with 3 address lines and control signals to execute data bus read and write transactions. The M770 data interface supports the Intel compatible types of CPUs. No clock (oscillator nor external clock) is required for a data bus transaction. Each bus cycle is asynchronous using CS#, IOR# and IOW# inputs. A typical data bus interconnection for Intel mode is shown in Figure 3. FIGURE 3. XR16M770 TYPICAL INTEL DATA BUS INTERCONNECTIONS VCC VCC A0 A1 A2 UART_CS# IOR# IOW# CS# IOR# IOW# UART_INT INT Intel Data Bus Interconnections GND UART_RESET RESET RI# CD# DSR# CTS# RTS# DTR# RX TX PwrSave D0 D1 D2 D3 D4 D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7 A0 A1 A2 Serial Transceivers of RS-232 RS-485 RS-422 Or Infrared POWERSAVE |
Similar Part No. - XR16M770IB25 |
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Similar Description - XR16M770IB25 |
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