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AD7357YRUZ Datasheet(PDF) 19 Page - Analog Devices
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AD7357YRUZ Datasheet(HTML) 19 Page - Analog Devices
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Rev. 0 | Page 19 of 20
GROUNDING AND LAYOUT
The analog and digital supplies to the AD7357 are independent
and separately pinned out to minimize coupling between the
analog and digital sections of the device. The printed circuit
board (PCB) that houses the AD7357 should be designed so
that the analog and digital sections are separated and confined
to certain areas of the board. This design facilitates the use of
ground planes that can be easily separated.
To provide optimum shielding for ground planes, a minimum
etch technique is generally best. The two AGND pins of the
AD7357 should be sunk in the AGND plane. Digital and analog
ground plans should be joined in only one place. If the AD7357
is in a system where multiple devices require an AGND and
DGND connection, the connection should still be made at one
point only. A star ground point should be established as close as
possible to the ground pins on the AD7357.
Avoid running digital lines under the device because this couples
noise onto the die. The analog ground planes should be allowed
to run under the AD7357 to avoid noise coupling. The power
supply lines to the AD7357 should use as large a trace as poss-
ible to provide low impedance paths and reduce the effects of
glitches on the power supply line.
To avoid radiating noise to other sections of the board, fast
switching signals such as clocks should be shielded with
digital ground, and clock signals should never run near the
analog inputs. Avoid crossover of digital and analog signals.
To reduce the effects of feedthrough within the board, traces
on opposite sides of the board should run at right angles to
each other. A microstrip technique is the best method, but
it is not always possible with a double-sided board. In this
technique, the component side of the board is dedicated to
ground planes, while signals are placed on the solder side.
Good decoupling is important; all supplies should be decoupled
with 10 μF tantalum capacitors in parallel with 0.1 μF capacitors
to GND. To achieve the best results from these decoupling compo-
nents, they must be placed as close as possible to the device,
ideally right up against the device. The 0.1 μF capacitor should
have low effective series resistance (ESR) and effective series
inductance (ESI), such as the common ceramic types or surface-
mount types. These low ESR and ESI capacitors provide a
low impedance path to ground at high frequencies to handle
transient currents due to logic switching.
EVALUATING THE AD7357 PERFORMANCE
The recommended layout for the AD7357 is outlined in eval-
uation board documentation. The evaluation board package
includes a fully assembled and tested evaluation board, docu-
mentation, and software for controlling the board from the PC
via the converter evaluation and development board (CED).
The CED can be used in conjunction with the AD7357 evalua-
tion board (as well as many other evaluation boards ending in
the ED designator from Analog Devices, Inc.) to demonstrate/
evaluate the ac and dc performance of the AD7357.
The software allows the user to perform ac (fast Fourier transform)
and dc (linearity) tests on the AD7357. The software and docu-
mentation are on a CD that is shipped with the evaluation board.
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