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SM55161A Datasheet(PDF) 49 Page - Austin Semiconductor |
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SM55161A Datasheet(HTML) 49 Page - Austin Semiconductor |
49 / 64 page VRAM SM55161A Production Austin Semiconductor, Inc. AustinSemiconductor,Inc.reservestherighttochangeproductsorspecificationswithoutnotice. 49 SMJ55161A Rev. 1.6 03/05 COLUMN MASK DATA TABLE 14: ENHANCED-PAGE-MODE BLOCK-WRITE-CYCLE STATE TABLE Write-mask data 0: I/O write disable 1: I/O write enable DQ Column-mask data DQi – DQi + 7 0: column-write disable (i = 0,8) 1: column-write enable 12 3 Block-write operation (nonmasked) H Don't Care Valid Data Block-write operation with nonpersistent write-per-bit L Write Mask Valid Data Block-write operation with persistent write-per-bit L Don't Care Valid Data CYCLE STATE DQ0-15 COLUMN MASK DATA DQ0 Column 0 (A0 = 0, A1 = 0, A2 = 0) DQ1 Column 1 (A0 = 1, A1 = 0, A2 = 0) DQ2 Column 2 (A0 = 0, A1 = 1, A2 = 0) DQ3 Column 3 (A0 = 1, A1 = 1, A2 = 0) DQ4 Column 4 (A0 = 0, A1 = 0, A2 = 1) DQ5 Column 5 (A0 = 1, A1 = 0, A2 = 1) DQ6 Column 6 (A0 = 0, A1 = 1, A2 = 1) DQ7 Column 7 (A0 = 1, A1 = 1, A2 = 1) DQ8 Column 0 (A0 = 0, A1 = 0, A2 = 0) DQ9 Column 1 (A0 = 1, A1 = 0, A2 = 0) DQ10 Column 2 (A0 = 0, A1 = 1, A2 = 0) DQ11 Column 3 (A0 = 1, A1 = 1, A2 = 0) DQ12 Column 4 (A0 = 0, A1 = 0, A2 = 1) DQ13 Column 5 (A0 = 1, A1 = 0, A2 = 1) DQ14 Column 6 (A0 = 0, A1 = 1, A2 = 1) DQ15 Column 7 (A0 = 1, A1 = 1, A2 = 1) Lower Byte Upper Byte Low: Mask High: No Mask Low: Mask High: No Mask |
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